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Número de pieza MAS6502
Descripción Piezoresistive Sensor Signal Interface IC
Fabricantes Micro Analog systems 
Logotipo Micro Analog systems Logotipo



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DA6502.008
29 November 2012
MAS6502
Piezoresistive Sensor
Signal Interface IC
Optimized for Piezoresistive
Pressure Sensors
Very Low Power Consumption
Ratiometric 16 Bit ∆Σ ADC
Linearity 14 Bits
Internal Clock Oscillator
Serial Data Interface (I2C® Bus)
256 Bit EEPROM Memory
DESCRIPTION
MAS6502 is a 16 bit Analog-to-Digital Converter
(ADC), which employs a delta-sigma (∆Σ)
conversion technique. With the linear input signal
range of 260 mVPP the linearity is 14 bits.
MAS6502 is designed especially to meet
the requirement for low power consumption, thus
making it an ideal choice for battery powered
systems. The MAS6502 is equipped with a standby
function, i.e. the ADC is in power down between
each conversion. By utilizing this and overall low
power consumption, current consumption values of
2.5 µA (one pressure conversion in a second with
full 14-bit accuracy) or less can be achieved.
MAS6502 has an on-chip second order
decimator filter to process the output of the second
order ∆Σ -modulator. The ADC also has four
selectable input signal ranges with one optional
offset level. An internal trimmed clock oscillator
provides a system clock signal (DCLK) eliminating
the need for an external clock signal.
A bi-directional I2C® bus compatible 2-wire
serial bus is used for configuring conversion
parameters, starting conversion and reading out the
A/D conversion result.
MAS6502 has one input channel suitable
for a piezoresistive pressure sensor. In addition to
pressure measurement the device can be
configured also for temperature measurement.
The 256-bit EEPROM memory is available
for storing trimming and calibration data on chip.
FEATURES
APPLICATIONS
Low Standby Current Consumption 0.05 µA Typ
Calibrated Piezoresistive Pressure Modules
Very Low Supply Current: 0.4 µA…2.5 µA Typ
Temperature measurement
Supply Voltage: 2.0 V…3.6 V
Battery Powered Systems
Ratiometric ∆Σ Conversion
Low Frequency Measurement Applications
Selectable Input Signal Ranges (VDD=2.35V):
Current/Power Consumption Critical Systems
325 mVPP, 220 mVPP, 150 mVPP, 100 mVPP
Industrial and Process Control Applications in
Selectable Optional Offset (VDD=2.35V):
Noisy Environments
33 mV
Selectable Sensor Resistance Values
5 k, 4.5 k, 4 k, 3.4 k
Over Sampling Ratio: 512, 256, 128, 64
Internal System Clock Signal 100 kHz
Conversion Times 0.8 ms…10.6 ms Typ
2-Wire Serial Data Interface (I2C® Bus)
256 Bit EEPROM Memory
Good Noise Performance due to ∆Σ
Architecture
I2C is a registered trademark of NXP.
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MAS6502 pdf
DA6502.008
29 November 2012
ELECTRICAL CHARACTERISTICS
TA = -40oC to +85oC, VDD = 2.0V to 3.6V, Typ TA = 27oC, Typ VDD = 2.35 V, Rsensor = 4.5kunless otherwise noted
Parameter
Symbol
Conditions
Min Typ Max
Unit
Temperature
Measurement Resistors
R1
R2
R4
R3
Temperature
Coefficient of
Temperature
Measurement Resistors
EEPROM size
TCR
Rsensor = 5 k
Rsensor = 4.5 k
Rsensor = 4 k
Rsensor = 3.4 k
-19%
-19%
13900
30600
30600
8900
9400
9900
10500
-180
+19%
+19%
ppm / °C
Note 1.
256 bit
EEPROM data write
time
Note 2.
16 ms
EEPROM data erase
time
Note 3.
8 ms
EEPROM data retention
TA = +85 °C
TA = +125 °C
10 24
1
years
Note 1. 8 bits out of 256 bits are reserved for internal oscillator trimming. The remaining 248 bits can be freely used for storing
calibration coefficients and other data.
Note 2. There should be at least a 16ms delay after each EEPROM write since EEPROM programming can take up to 16ms.
Note 3. There should be at least a 8ms delay after each EEPROM erase since EEPROM erasing can take up to 8ms.
Digital inputs
TA = -40oC to +85oC, VDD = 2.0V to 3.6V, Typ TA = 27oC, Typ VDD = 2.35 V, RP = 4.7kΩ (I2C bus pull up) unless otherwise noted
Parameter
Symbol
Conditions
Min Typ Max
Unit
Input High Voltage
Input Low Voltage
Serial Bus Clock
Frequency
XCLR Reset Pulse
Length
XCLR Pin Pull Up
Current
VIH
VIL
fSCL
tXCLR
IPULL_UP
XCLR low pulse
XCLR=0V
80%
VDD
0%
VDD
200
-1
100%
VDD
20%
VDD
400
-8 -80
V
V
kHz
ns
µA
Digital outputs
TA = -40oC to +85oC, VDD = 2.0V to 3.6V, Typ TA = 27oC, Typ VDD = 2.35 V, RP = 4.7kΩ (I2C bus pull up) unless otherwise noted
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP MAX
UNIT
Output high voltage
Output low voltage
Signal rise time
(from 10% to 90%)
Signal fall time
(from 90% to 10%)
VOH
ISource=0.6mA
80%
VDD
100%
VDD
V
VOL
ISink=0.6mA
0%
VDD
20%
VDD
V
tr EOC pin, CL=50pF 14 ns
SDA pin, CB=50pF
550
tf EOC pin, CL=50pF 11 ns
SDA pin, CB=50pF
11
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MAS6502 arduino
DA6502.008
29 November 2012
SERIAL DATA INTERFACE (I2C® BUS) CONTROL
Serial Interface
MAS6502 has an I2C® bus compatible two wire
serial data interface comprising of serial clock
(SCL) and bi-directional serial data (SDA) pins. Both
the SCL & SDA lines, in the I2C® bus, are of open-
drain design, thus, external pull-up resistors are
needed.
The serial data interface is used to configure and
start the A/D conversion and read the measurement
result when the A/D conversion has been finished.
The digital interface includes also end of conversion
(EOC) and master reset (XCLR) pins. The EOC
goes high when the A/D conversion has finished.
The XCLR signal is active low and used to reset the
A/D converter. A reset initializes the serial
Device Address
The I2C® bus definition allows several I2C® bus
devices to be connected to the same bus. The
devices are distinguished from each other by unique
device address codes. MAS6502 device address is
communication bus and sets internal registers and
counters to value 00HEX. After connecting the supply
voltage to MAS6502, and before starting operating
the device via the serial bus, it is required to reset
the device with the XCLR reset pin or using reset
register (30HEX) if the supply voltage rise time has
been longer than 400 ns. If the supply voltage rise
time is shorter than this making an external reset is
not necessary since the device is automatically
reset by the power on reset (POR) circuitry. It is
however recommended to use the XCLR reset
feature to solve unexpected error state conditions.
The XCLR pin can be left unconnected when not
used. It has internal pull up to VDD. See Electrical
Characteristics for the XCLR Pin Pull Up Current.
shown in table 7. The LSB bit of the device address
defines whether the bus is configured for Read (1)
or Write (0) operation.
Table 7. MAS6502 device address
A7 A6 A5 A4 A3 A2 A1
1110111
I2C® Bus Protocol Definitions
W/R
0/1
Data transfer is initiated with a Start bit (S) when
SDA is pulled low while SCL stays high. Then, SDA
sets the transferred bit while SCL is low and the
data is sampled (received) when SCL rises. When
the transfer is complete, a Stop bit (P) is sent by
releasing the data line to allow it to be pulled up
while SCL is constantly high.
Figure 3 shows the start (S) and stop (P) bits and a
S1P
SDA
0
SCL
Figure 3. I2C® bus protocol definitions
Bus communication includes Acknowledge (A) and
not Acknowledge (N) messages. To send an
acknowledge the receiver device pulls the SDA low
for one SCL clock cycle. For not acknowledge (N)
Abbreviations:
A= Acknowledge by Receiver
N = Not Acknowledge by Receiver
S = Start
Sr = Repeated Start
data bit. Data must be held stable at the SDA pin
when SCL is high. Data at the SDA pin can change
value only when SCL is low.
Each SDA line byte must contain 8-bits when the
most significant bit (MSB) is always first. Each byte
has to be followed by an acknowledge bit (see
further below). The number of bytes transmitted per
transfer is unrestricted.
the receiver device leaves the SDA high for one
SCL clock cycle in which case the master can then
generate either a Stop (P) bit to abort the transfer,
or a repeated Start (Sr) bit to start a new transfer.
P = Stop
= from Master (MCU) to Slave (MAS6502)
= from Slave (MAS6502) to Master (MCU)
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