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PDF SN8P2707A Data sheet ( Hoja de datos )

Número de pieza SN8P2707A
Descripción 8-Bit Micro-Controller
Fabricantes Sonix　
Logotipo Sonix Logotipo



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No Preview Available ! SN8P2707A Hoja de datos, Descripción, Manual

SN8P2700A Series
8-bit micro-controller build-in 12-bit ADC
SN8P2700A Series
USER’S MANUAL
Version 1.7
SN8P2704A
SN8P2705A
SN8P2706A
SN8P2707A
SN8P2708A
SONiX 8-Bit Micro-Controller
SONIX reserves the right to make change without further notice to any products herein to improve reliability, function or design. SONIX does not
assume any liability arising out of the application or use of any product or circuit described herein; neither does it convey any license under its patent
rights nor the rights of others. SONIX products are not designed, intended, or authorized for us as components in systems intended, for surgical
implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SONIX product
could create a situation where personal injury or death may occur. Should Buyer purchase or use SONIX products for any such unintended or
unauthorized application. Buyer shall indemnify and hold SONIX and its officers, employees, subsidiaries, affiliates and distributors harmless against
all claims, cost, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use even if such claim alleges that SONIX was negligent regarding the design or manufacture of
the part.
SONiX TECHNOLOGY CO., LTD
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Version 1.7

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SN8P2707A pdf
SN8P2700A Series
8-bit micro-controller build-in 12-bit ADC
33 RESET ............................................................................................................................................... 45
3.1 OVERVIEW................................................................................................................................ 45
3.2 POWER ON RESET .................................................................................................................... 46
3.3 WATCHDOG RESET ................................................................................................................. 46
3.4 BROWN OUT RESET................................................................................................................. 47
3.4.1 BROWN OUT DESCRIPTION ............................................................................................. 47
3.4.2 THE SYSTEM OPERATING VOLTAGE DECSRIPTION...................................................... 48
3.4.3 BROWN OUT RESET IMPROVEMENT............................................................................... 48
3.5 EXTERNAL RESET ................................................................................................................... 50
3.6 EXTERNAL RESET CIRCUIT ................................................................................................... 50
3.6.1 Simply RC Reset Circuit ....................................................................................................... 50
3.6.2 Diode & RC Reset Circuit .................................................................................................... 51
3.6.3 Zener Diode Reset Circuit .................................................................................................... 51
3.6.4 Voltage Bias Reset Circuit.................................................................................................... 52
3.6.5 External Reset IC ................................................................................................................. 53
44 SYSTEM CLOCK ............................................................................................................................. 54
4.1 OVERVIEW................................................................................................................................ 54
4.2 CLOCK BLOCK DIAGRAM ...................................................................................................... 54
4.3 OSCM REGISTER ...................................................................................................................... 55
4.4 SYSTEM HIGH CLOCK............................................................................................................. 56
4.4.1 EXTERNAL HIGH CLOCK.................................................................................................. 56
4.4.1.1 CRYSTAL/CERAMIC..................................................................................................... 57
4.4.1.2 RC.................................................................................................................................... 57
4.4.1.3 EXTERNAL CLOCK SIGNAL ....................................................................................... 58
4.5 SYSTEM LOW CLOCK.............................................................................................................. 59
4.5.1 SYSTEM CLOCK MEASUREMENT..................................................................................... 60
55 SYSTEM OPERATION MODE ....................................................................................................... 60
5.1 OVERVIEW................................................................................................................................ 60
5.2 SYSTEM MODE SWITCHING................................................................................................... 62
5.3 WAKEUP.................................................................................................................................... 64
5.3.1 OVERVIEW.......................................................................................................................... 64
5.3.2 WAKEUP TIME ................................................................................................................... 64
5.3.3 P1W WAKEUP CONTROL REGISTER................................................................................ 65
66 INTERRUPT ..................................................................................................................................... 66
6.1 OVERVIEW................................................................................................................................ 66
6.2 INTEN INTERRUPT ENABLE REGISTER................................................................................ 67
6.3 INTRQ INTERRUPT REQUEST REGISTER ............................................................................. 68
SONiX TECHNOLOGY CO., LTD
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SN8P2707A arduino
SN8P2700A Series
8-bit micro-controller build-in 12-bit ADC
Migration SN8P1700 Series to SN8P2700A Series
Item
SN8P270xA
SN8P170x
Excellent
AC Noise Immunity Capability
(Add an 47uF bypass Capacitor
Normal
between VDD and GND)
Computation Power (16MHz Crystal)
Up to 16 MIPS
Up to 4 MIPS
PWM Resolution: 8bit/6bit/5bit/4bit PWM Resolution: 8bit Only
High Speed PWM
8bit PWM up to 31.25K at 16Mhz
Up to 7.8125K at 16Mhz
4bit PWM up to 500K at 16Mhz
Maximum I/O in 48 pins package
(SN8P2708A vs. SN8P1708)
36 (P1.6 / P1.7 / P3.0)
33
Programmable Open-Drain Output
P1.0 / P1.1 / P5.2 (SO)
-
B0MOV M, I
I can’t be 0E6h or 0E7h
No Limitation
B0XCH A, M
The address of M can’t be 80h ~ FFh
No Limitation
Valid instruction in ROM address 8
JMP or NOP
No Limitation
ADC Interrupt
Yes -
ADC VREFL (Low Reference Voltage)
Yes
-
ADC Clock Frequency
Seven kinds of setting
(Configuration by ADCKS [2:0])
Two kinds of setting
(Configuration by ADCKS)
Green Mode
Yes -
Schmitt Trigger Input
All input pin
Port 0, RST, XIN
Port 0
Input/Output pin
Input pin Only
P0.0 Interrupt Edge Trigger
Falling/Rising/Both
Falling
P0.1/P0.2 Interrupt Edge Trigger
Falling
Falling
Port 0 and Port 1 Wakeup Trigger
Level Change (Falling or Rising)
Low Level
Wakeup Time
1/Fosc * 4096 (sec)
+ Oscillator settling time
1/Fosc * 2048 (sec)
+ Oscillator settling time
Double SIO receive buffer
Yes -
SEDGE bit definition of SIOM register
Refer SIO and application notice section
Valid Range of TC0C/TC1C/TC0R/TC1R
0x00 ~ 0xFE
0x00 ~ 0xFF
Watchdog timer clock source
Internal Low RC
External High Clock
Clear Watchdog
MOV A, #0x5A
B0MOV WDTR, A
B0BSET FWDRST
LVD
1.8V always ON
2.4V ON/OFF
Standby Current
1uA at 5V
9uA at 5V (LVD OFF)
Note: 1. Level change trigger mean falling or rising edge trigger.
2. Enable the Pull-Up resistors of undefined Port 1 pins to avoid sleep mode fail or extra
standby current:
SN8P2704A: Set bit 5 ~ bit 7 of P1UR to “1”, (P1.5~P1.7)
SN8P2705A: Set bit 6 ~ bit 7 of P1UR to “1”, (P1.6~P1.7)
SN8P2706A: Set bit 6 ~ bit 7 of P1UR to “1”, (P1.6~P1.7)
SN8P2707A: Set bit 6 ~ bit 7 of P1UR to “1”, (P1.6~P1.7)
SONiX TECHNOLOGY CO., LTD
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Version 1.7

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