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Número de pieza | HD74HC75 | |
Descripción | Quad. Bistable Latches | |
Fabricantes | Hitachi Semiconductor | |
Logotipo | ||
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Quad. Bistable Latches
Description
This latch is ideally suited for use as temporary storage for binary information processing, input/output, and
indicator units. Information present at the data (D) input is transferred to the Q output when the latch
enable (LE) is high. The Q output will follow the data input as long as the enable remains high. when the
enable goes low, the information that was present at the data input at the time the transition occurred is
retained at thte Q output unit the enable is permitted to go high again.
Features
• High Speed Operation: tpd (D to Q) = 12.5 ns typ (CL = 50 pF)
• High Output Current: Fanout of 10 LSTTL Loads
• Wide Operating Voltage: VCC = 2 to 6 V
• Low Input Current: 1 µA max
• Low Quiescent Supply Current: ICC (static) = 2 µA max (Ta = 25°C)
Function Table
Inputs
D
L
H
X
Latch Enable
H
H
L
Outputs
Q
L
H
Q0
Q
H
L
Q0
1 page 19.20
20.00 Max
16
9
1
1.3
1.11 Max
8
Unit: mm
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25
+
–
0.13
0.05
0° – 15°
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
DP-16
Conforms
Conforms
1.07 g
5 Page |
Páginas | Total 8 Páginas | |
PDF Descargar | [ Datasheet HD74HC75.PDF ] |
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