PDF BUK3F00-50WDFE Data sheet ( Hoja de datos )

Número de pieza	BUK3F00-50WDFE
Descripción	Controller
Fabricantes	NXP Semiconductors
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No Preview Available ! BUK3F00-50WDxx Controller for TrenchPLUS FETs Rev. 04 — 4 September 2008 Product data sheet 1. Introduction This data sheet describes a family of integrated circuits which provide direct digital control of multiple power switches (TrenchPLUS FETs) for use in automotive applications, and which are available in various conﬁgurations. 2. General description Eight channel high-side switch controller in a leaded plastic quad ﬂat package, with digital control and diagnostics, and load current measurement. Speciﬁc conﬁgurations are denoted by the last 2 letters in the type number. 3. Features I Standby mode with very low power consumption I Programmable drain current tripping I Serial Peripheral Interface (SPI) communications I Outputs controllable via SPI-bus or direct input I Diagnostic status reporting via SPI-bus I Analog and digital drain current measurement I Watchdog for invalid commands or inactive SPI, with programmable time-out I Programmable interrupt generator I Overtemperature protection I Pulse-width modulation with programmable frequency and duty cycle I ESD protection on all pins I Protection for battery transient overvoltage and reversed polarity battery connection I Open-circuit detection I Conﬁgurable fail-safe channel control options 4. Applications I Automotive applications such as DC and pulse-width modulation control in body control clusters, etc. 1 page NXP Semiconductors BUK3F00-50WDxx Controller for TrenchPLUS FETs BUK3F00-50WDXX_4 Product data sheet Table 4. Pin description …continued Symbol Pin Description Charge pump capacitors CPP 40 positive connection to external pump capacitor CPN 41 negative connection to external pump capacitor CT 39 connection to external storage capacitor Digital EN 11 enable input; internal pull-down resistor INTN 46 interrupt output; open-drain output WDEN 15 watchdog enable input; internal pull-up resistor WDTON 2 watchdog timed output; open-drain output PWMMON 47 PWM frequency monitor output Serial peripheral interface SCLK 34 SPI clock input; internal pull-down resistor SCSN 35 SPI chip select input; internal pull-up resistor SDI 36 SPI data input; internal pull-down resistor SDO 45 SPI data output; 3-state when inactive Analog IREFCURR 8 set reference for current measurement (with external resistor) IREFTEMP 9 set reference for temperature sense (with external resistor) IMEAS 5 analog current measurement output (for selected channel) Direct input pins IN0 3 direct input 0; internal pull-down resistor IN1 4 direct input 1; internal pull-down resistor IN2 13 direct input 2; internal pull-down resistor IN3 12 direct input 3; internal pull-down resistor INP 14 PWM input; internal pull-down resistor Connections for external TrenchPLUS switches Channel 0 GATE0 64 gate KELVIN0 61 source kelvin SENSE0 63 current sense ANODE0 62 anode of temperature sense diode Channel 1 GATE1 60 gate KELVIN1 57 source kelvin SENSE1 59 current sense ANODE1 58 anode of temperature sense diode Channel 2 GATE2 56 gate KELVIN2 53 source kelvin SENSE2 55 current sense ANODE2 54 anode of temperature sense diode Rev. 04 — 4 September 2008 © NXP B.V. 2008. All rights reserved. 5 of 52 5 Page NXP Semiconductors BUK3F00-50WDxx Controller for TrenchPLUS FETs Table 5. User-accessible registers …continued Register[1] Name Description Mask Version default value[2] option FE FM FY 19h OT_TRIPLEV_CH74 overtemperature trip level channels 7 to 4; Y[4] AAh AAh AAh see Section 9.5.1 1Ah IFSC_CH30 full-scale reference current channels 3 to 0; see Section 9.5.2 Y[4] AAh FFh FFh 1Bh IFSC_CH74 full-scale reference current channels 7 to 4; see Section 9.5.2 Y[4] AAh FFh FFh 1Ch CURR_TRIPLEV_CH0 current trip level for channel 0; see Section 9.5.2 N[4] FFh FFh FFh 1Dh CURR_TRIPLEV_CH1 current trip level for channel 1; see Section 9.5.2 N[4] FFh FFh FFh 1Eh CURR_TRIPLEV_CH2 current trip level for channel 2; see Section 9.5.2 N[4] FFh FFh FFh 1Fh CURR_TRIPLEV_CH3 current trip level for channel 3; see Section 9.5.2 N[4] FFh FFh FFh 20h CURR_TRIPLEV_CH4 current trip level for channel 4; see Section 9.5.2 N[4] FFh FFh FFh 21h CURR_TRIPLEV_CH5 current trip level for channel 5; see Section 9.5.2 N[4] FFh FFh FFh 22h CURR_TRIPLEV_CH6 current trip level for channel 6; see Section 9.5.2 N[4] FFh FFh FFh 23h CURR_TRIPLEV_CH7 current trip level for channel 7; see Section 9.5.2 N[4] FFh FFh FFh 24h IRQ_MAP interrupt request mapping; see Section 9.5.2 Y[4] 04h 19h 00h 25h CURR_TRIP_ BLANKTIME current trip blanking time; see Section 9.5.2 Y[4] 2Fh 2Fh 2Fh 26h OLDET_ONOFF off-state open-circuit detection; see Section 9.5.6 N FFh FFh FFh 27h READBACK register and diagnostic read back; see Section 9.3.2 N 30h 30h 30h 28h IRQ_CHAN_MAP interrupt generating channels; see Section 9.3.5 N[4] FFh FFh FFh Write-only registers[6] 29h CLEAR_CHAN_INTN clear channels and interrupt; see Section 11.1 2Ah CLEAR_WD clear watchdog state; see Section 11.1 Read-only registers[7] 30h DIAG_BASIC basic diagnostics; see Section 11.2 31h DIAG_CTRL controller diagnostics; see Section 11.2 32h ISR interrupt status register; see Section 11.2 33h VERSION device version number; see Section 11.2 34h DIAG_CHAN_01 VOUTHIGH and VOUTLOW states[8]; see Section 11.2 35h DIAG_CHAN_02 TSNSOPEN signal state[9]; see Section 11.2 38h DIAG_DETAIL_CH0 detail diagnostics; channel 0; see Section 11.2 39h DIAG_DETAIL_CH1 detail diagnostics; channel 1; see Section 11.2 BUK3F00-50WDXX_4 Product data sheet Rev. 04 — 4 September 2008 © NXP B.V. 2008. All rights reserved. 11 of 52 11 Page

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