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PDF SIC414 Data sheet ( Hoja de datos )
| Número de pieza | SIC414 | |
| Descripción | 28 V Integrated Buck Regulator | |
| Fabricantes | Vishay Siliconix | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de SIC414 (archivo pdf) en la parte inferior de esta página. Total 24 Páginas | ||
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SiC414
Vishay Siliconix
microBUCKTM SiC414
6 A, 28 V Integrated Buck Regulator with 5 V LDO
DESCRIPTION
The Vishay Siliconix SiC414 is an advanced stand-alone
synchronous buck regulator featuring integrated power
MOSFETs, bootstrap switch, and an internal 5 V LDO in a
space-saving MLPQ 4 x 4 - 28 pin package.
The SiC414 is capable of operating with all ceramic solutions
and switching frequencies up to 1 MHz. The programmable
frequency, synchronous operation and selectable
power-save allow operation at high efficiency across the full
range of load current. The internal LDO may be used to
supply 5 V for the gate drive circuits or it may be bypassed
with an external 5 V for optimum efficiency and used to drive
external n-channel MOSFETs or other loads. Additional
features include cycle-by-cycle current limit, voltage soft-
start, under-voltage protection, programmable over-current
protection, soft shutdown and selectable power-save. The
Vishay Siliconix SiC414 also provides an enable input and a
power good output.
PRODUCT SUMMARY
Input Voltage Range
Output Voltage Range
Operating Frequency
Continuous Output Current
Peak Efficiency
Package
3 V to 28 V
0.75 V to 5.5 V
200 kHz to 1 MHz
6A
95 % at 300 kHz
MLPQ 4 mm x 4 mm
FEATURES
• High efficiency > 95 %
• 6 A continuous output current capability
• Integrated bootstrap switch
• Integrated 5 V/200 mA LDO with bypass logic
• Temperature compensated current limit
• Pseudo fixed-frequency adaptive on-time control
• All ceramic solution enabled
• Programmable input UVLO threshold
• Independent enable pin for switcher and LDO
• Selectable ultra-sonic power-save mode
• Internal soft-start and soft-shutdown
• 1 % internal reference voltage
• Power good output and over voltage protection
• Halogen-free according to IEC 61249-2-21 definition
• Compliant to RoHS directive 2002/95/EC
APPLICATIONS
• Notebook, desktop and server computers
• Digital HDTV and digital consumer applications
• Networking and telecommunication equipment
www.DataSheet.net/
• Printers, DSL and STB applications
• Embedded applications
• Point of load power supplies
TYPICAL APPLICATION CIRCUIT
LDO_EN
VOUT
EN/PSV (Tri-State)
3.3 V
PGOOD
28 27 26 25 24 23 22
1 FB
LX 21
2 V5V
3 AGND
PAD1
AGND
LX 20
PGND 19
VIN
4 VOUT
PAD3
LX
PGND 18
5 VIN
6 VLDO
PAD2
VIN
PGND 17
PGND 16
7 BST
LX 15
8 9 10 11 12 13 14
VOUT
Document Number: 65726
S10-1091-Rev. B, 03-May-10
SiC414 (MLP 4 x 4-28L)
www.vishay.com
1
Datasheet pdf - http://www.DataSheet4U.co.kr/
1 page  
SiC414
Vishay Siliconix
ELECTRICAL SPECIFICATIONS
Parameter
Fault Protection
Symbol
Test Conditions Unless Specified
VIN = 12 V, V5V = 5 V, TA = + 25 °C for typ.,
- 25 °C to + 85 °C for min. and max.,
TJ = < 125 °C
Min.
Typ.
Max. Unit
ILIM Source Current
Valley Current Limit
ILIM Comparator Offset Voltage
Output Under-Voltage Fault
ILIM
VILM-LK
VOUV_Fault
RILIM = 5 k
With respect to AGND
VFB with respect to Internal 500 mV
reference, 8 consecutive clocks
8 µA
3 4 5.3 A
- 8 0 + 8 mV
- 25 %
Smart Power-Save Protection
Threshold Voltageb
Over-Voltage Protection Threshold
Over-Voltage Fault Delayb
Over Temperature Shutdownb
Logic Inputs/Outputs
PSAVE_VTH
tOV-Delay
TShut
VFB with respect to internal 500 mV
reference
VFB with respect to internal 500 mV
reference
10 °C hysteresis
+ 10
+ 20
5
150
%
µs
°C
Logic Input High Voltage
Logic Input Low Voltage
EN/PSV Input Bias Current
ENL Input Bias Current
FBL, FB Input Bias Current
Linear Dropout Regulator
VIN+
VIN-
IEN-
FBL_ILK
EN, ENL, PSV
EN/PSV = V5V or AGND
VIN = 28 V
FBL, FB = V5V or AGND
1
V
0.4
- 10 + 10
11 18 µA
-1 +1
VLDO Accuracy
VLDOACC
VLDO load = 10 mA
4.9 5.0 5.1 V
LDO Current Limit
VLDO to VOUT Switch-Over Thresholdc
VLDO to VOUT Non-Switch-Over Thresholdc
LDO_ILIM
VLDO-BPS
VLDO-NBPS
Start-up and foldback, VIN = 12 V
Operating current limit, VIN = 12 V
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85
134 200
mA
- 140
- 450
+ 140
mV
+ 450
VLDO to VOUT Switch-Over Resistance
RLDO
VOUT = 5 V
2
LDO Drop Out Voltaged
From VIN to VVLDO, VVLDO = + 5 V,
IVLDO = 100 mA
1.2 V
Notes:
a. VIN UVLO is programmable using a resistor divider from VIN to ENL to AGND. The ENL voltage is compared to an internal reference.
b. Guaranteed by design.
c. The switch-over threshold is the maximum voltage diff erential between the VLDO and VOUT pins which ensures that VLDO will internally
switch-over to VOUT. The non-switch-over threshold is the minimum voltage diff erential between the VLDO and VOUT pins which ensures that
VLDO will not switch-over to VOUT.
d. The LDO drop out voltage is the voltage at which the LDO output drops 2 % below the nominal regulation point.
Document Number: 65726
S10-1091-Rev. B, 03-May-10
www.vishay.com
5
Datasheet pdf - http://www.DataSheet4U.co.kr/
5 Page 
FB ripple
voltage (VFB)
Inductor
current
FB threshold
(750 mV)
DC load current
On-time
(tON)
DH on-time is triggered when
VFB reaches the FB threshold
DH
DL
SiC414
Vishay Siliconix
Because the on-times are forced to occur at intervals no
greater than 40 µs, the frequency will not fall below ~ 25 kHz.
Figure 5 shows ultra-sonic power-save operation.
Benefits of Ultrasonic Power-Save
Having a fixed minimum frequency in power-save has some
significant advantages as below:
• The minimum frequency of 25 kHz is outside the audible
range of human ear. This makes the operation of the
SiC414 very quiet.
• The output voltage ripple seen in power-save mode is
significant lower than conventional power-save, which
improves efficiency at light loads.
• Lower ripple in power-save also makes the power
component selection easier.
DL drives high when on-time is completed.
DL remains high until VFB falls to the FB threshold.
Figure 4 - Forced Continuous Mode Operation
Ultrasonic Power-Save Operation
The SiC414 provides ultra-sonic power-save operation at
light loads, with the minimum operating frequency fixed at
25 kHz. This is accomplished using an internal timer that
monitors the time between consecutive high-side gate
pulses.
If the time exceeds 40 µs, DL drives high to turn the low-side
MOSFET on. This draws current from VOUT through the
inductor, forcing both VOUT and VFB to fall. When VFB drops
to the 750 mV threshold, the next DH on-time is triggered.
After the on-time is completed the high-side MOSFET is
turned off and the low-side MOSFET turns on, the low-side
MOSFET remains on until the inductor current ramps down
to zero, at which point the low-side MOSFET is turned off.
minimum fSW ~ 25 kHz
FB ripple
voltage (VFB)
FB threshold
(750 mV)
Inductor
current
(0 A)
On-time
(tON)
DH on-time is triggered when
VFB reaches the FB threshold
DH
DL
After the 40 µs time-out, DL drives high if VFB
has not reached the FB threshold.
Figure 5 - Ultrasonic power-save Operation
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Figure 6 - Ultrasonic Power-Save Operation Mode
Figure 6 shows the behavior under power-save and
continuous conduction mode at light loads.
Smart Power-Save Protection
Active loads may leak current from a higher voltage into the
switcher output. Under light load conditions with power-save-
power-save enabled, this can force VOUT to slowly rise and
reach the over-voltage threshold, resulting in a hard shut-
down. Smart power-save prevents this condition.
When the FB voltage exceeds 10 % above nominal (exceeds
825 mV), the device immediately disables power-save, and
DL drives high to turn on the low-side MOSFET. This draws
current from VOUT through the inductor and causes VOUT to
fall. When VFB drops back to the 750 mV trip point, a normal
tON switching cycle begins.
This method prevents a hard OVP shutdown and also cycles
energy from VOUT back to VIN. It also minimizes operating
power by avoiding forced conduction mode operation.
Figure 7 shows typical waveforms for the smart power-save
feature.
Document Number: 65726
S10-1091-Rev. B, 03-May-10
www.vishay.com
11
Datasheet pdf - http://www.DataSheet4U.co.kr/
11 Page | ||
| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet SIC414.PDF ] | |
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