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PDF SSM4565GM Data sheet ( Hoja de datos )
| Número de pieza | SSM4565GM | |
| Descripción | N AND P-CHANNEL ENHANCEMENT MODE POWER MOSFET | |
| Fabricantes | Silicon Standard | |
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SSM4565M/GM
COMPLEMENTARY N- AND P-CHANNEL ENHANCEMENT-MODE POWER MOSFETS
Simple drive requirement
Lower gate charge
Fast switching characteristic
Description
D2
D2
D1 D2
D1 D1
D1
SO-8
G2
S2G2
G1 S2
S1
S1
G1
N-CH
P-CH
BV DSS
RDS(ON)
ID
BVDSS
RDS(ON)
ID
40V
25mΩ
7.6A
-40V
33mΩ
-6.5A
Advanced Power MOSFETs from Silicon Standard provide the
designer with the best combination of fast switching,
ruggedized device design, low on-resistance and cost-effectiveness.
The SSM4565M is in the SO-8 package, which is widely preferred for
commercial and industrial surface mount applications, and is well suited
for low voltage applications such as DC/DC converters.
G1
D1
G2
S1
D2
S2
This device is available with Pb-free lead finish (second-level interconnect) as SSM4565GM.
Absolute Maximum Ratings
Symbol
Parameter
VDS
VGS
ID @ TA=25°C
ID @ TA=70°C
IDM
PD @ TA=25°C
TSTG
TJ
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain Current3
Continuous Drain Current3
Pulsed Drain Current1
Total Power Dissipation
Linear Derating Factor
Storage Temperature Range
Operating Junction Temperature Range
Rating
N-channel P-channel
40 -40
±20 ±20
7.6 -6.5
6 -5.2
30 -30
2.0
0.016
-55 to 150
-55 to 150
Units
V
V
A
A
A
W
W/°C
°C
°C
Thermal Data
Symbol
Rthj-a
Parameter
Thermal Resistance Junction-ambient3
Max.
Value
62.5
Unit
°C/W
12/10/2004 Rev.2.01
www.SiliconStandard.com
1 of 5
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N-channel
14
I D =7A
12 V DS =32V
10
8
6
4
2
0
0 10 20 30
Q G , Total Gate Charge (nC)
40
Fig 7. Gate Charge Characteristics
SSM4565M/GM
f=1.0MHz
10000
C iss
1000
C oss
C rss
100
1 5 9 13 17 21 25 29
V DS , Drain-to-Source Voltage (V)
Fig 8. Typical Capacitance Characteristics
100
10
1
0.1 T A =25 o C
Single Pulse
100us
1ms
10ms
100ms
1s
DC
0.01
0.1
1 10
V DS , Drain-to-Source Voltage (V)
100
Fig 9. Maximum Safe Operating Area
1
Duty factor=0.5
0.2
0.1
0.1
0.05
0.01
0.02
0.01
Single Pulse
PDM
t
T
Duty factor = t/T
Peak Tj = PDM x Rthja + Ta
Rthja =135oC/W
0.001
0.0001
0.001
0.01 0.1
1
t , Pulse Width (s)
10
100 1000
Fig 10. Effective Transient Thermal Impedance
VDS
90%
10%
VGS
td(on) tr
td(off)tf
VG
4.5V
QG
QGS
QGD
Charge
Q
Fig 11. Switching Time Waveform
Fig 12. Gate Charge Waveform
12/10/2004 Rev.2.01
www.SiliconStandard.com
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| PDF Descargar | [ Datasheet SSM4565GM.PDF ] | |
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