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PDF AWT6310R Data sheet ( Hoja de datos )

Número de pieza AWT6310R
Descripción LINEAR POWER AMPLIFIER MODULE
Fabricantes ANADIGICS 
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FEATURES
• Single Mode Operation: POUT +28 dBm
• High Efficiency: 54 % AMPS, 39 % CDMA
• Low Quiescent Current: 50 mA
• 25 % Package Size Reduction
• Common VMODE Control Line
• Simplified VCC Bus PCB routing
• Reduced External Component Count
• Low Profile Surface Mount Package: 1.1 mm
• RoHS Compliant Package, 250 oC MSL-3
APPLICATIONS
• Dual-band Cellular/PCS CDMA Wireless
Handsets
AWT6310R
Dual-band CDMA/PCS
3.4 V/28 dBm Linear PowerAmplifier Module
PRELIMINARY DATA SHEET - Rev 1.1
AWT6310R
M23 Package
12 Pin 3 mm x 5 mm x 1 mm
Surface Mount Module
PRODUCT DESCRIPTION
The AWT6310R meets the increasing demands for
higher levels of integration in dual-band CDMA/PCS
1X handsets, while reducing board area
requirements by 25 %. The package pinout was
chosen to enable handset manufacturers to easily
route VCC to both power amplifiers and simplify
control with a common VMODE pin. The device is
manufactured on an advanced InGaP HBT MMIC
technology offering state-of-the-art reliability,
temperature stability, and ruggedness. Selectable
bias modes that optimize efficiency for different
output power levels, and a shutdown mode with low
leakage current, serve to increase handset talk and
standby time. The self contained 3 mm x 5 mm x 1 mm
surface mount package incorporates matching
networks optimized for output power, efficiency and
linearity in a 50 system.
GND at slug (pad)
VREF_CELL 1
RFIN_CELL 2
Bias Control
12 GND
11 RFOUT_CELL
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VMODE 3
VCC1 4
10 VCC2 A
9 VCC2
RFIN_PCS 5
8 GND
VREF_PCS 6
Bias Control
7 RFOUT_PCS
GND
Figure 1: Block Diagram
05/2006

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AWT6310R pdf
Table 5: Electrical Specifications - Cellular CDMA Operation
(TC = +25 °C, VCC = +3.4 V, VREF = +2.85 V, 50 system)
AWT6310R
PARAMETER
MIN TYP MAX UNIT
COMMENTS
Gain
25 27.0 29
24 26.5 29
24 25.5 28
Adjacent Channel Power
at ±885 kHz offset (1)
- -50 -47
Primary Channel BW = 1.23 MHZ -
-51 -47
Adjacent Channel BW = 30 kH
- -50 -47
Adjacent Channel Power
at ±1.98 MHz offset (1)
- -62 -57
Primary Channel BW = 1.23 MHZ - -60 -56
Adjacent Channel BW = 30 kHz
- -66 -57
Power-Added Efficiency (1)
37 39
37 40
89
-
-
-
POUT = +28 dBm, VMODE = 0 V
dB POUT = +28 dBm, VMODE = +2.85 V
POUT = +16 dBm, VMODE = +2.85 V
POUT = +28 dBm, VMODE = 0 V
dBc
POUT = +28 dBm, VMODE = +2.85 V
POUT = +16 dBm, VMODE = +2.85 V
POUT = +28 dBm, VMODE = 0 V
dBc
POUT = +28 dBm, VMODE = +2.85 V
POUT = +16 dBm, VMODE = +2.85 V
POUT = +28 dBm, VMODE = 0 V
% POUT = +28 dBm, VMODE = +2.85 V
POUT = +16 dBm, VMODE = +2.85 V
Quiescent Current (Icq)
- 50 70 mA VMODE = +2.85 V, Low Bias
Reference Current
- 1.5 3
mA through VREF pin
Mode Control Current
- 0.6 1.0 mA through VMODE pin
Leakage Current
- <1 5
µA VCC = +4.2 V, VREF = 0 V,
VMODE = 0 V
Noise in Receive Band
- -133 -131 dBm/Hz 869 MHz to 894 MHz
Harmonics
2fo
3fo, 4fo
-
-
-35 -30
-50 -30
dBc
Input Impedance
- - 2:1 VSWR
Spurious Output Level
(all spurious outputs)
-
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Load mismatch stress with no
permanent degradation or failure
10:1
Notes:
(1) PAE and ACP limit applies at 836.5 MHz.
-
-
POUT < +28 dBm
In-band Load VSWR < 5:1
-65 dBc Out-of-band Load VSWR < 10:1
Applies over all operating
conditions
-
VSWR
Applies over all operating
conditions
PRELIMINARY DATA SHEET - Rev 1.1
05/2006
5

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AWT6310R arduino
NOTES
AWT6310R
www.DataSheet4U.com
PRELIMINARY DATA SHEET - Rev 1.1
05/2006
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