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PDF STM8L162M8 Data sheet ( Hoja de datos )

Número de pieza STM8L162M8
Descripción 8-bit ultralow power MCU
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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No Preview Available ! STM8L162M8 Hoja de datos, Descripción, Manual

STM8L162M8 STM8L162R8
8-bit ultra-low-power MCU, 64 KB Flash, 2 KB data EEPROM, RTC,
AES, LCD, timers, USARTs, I2C, SPIs, ADC, DAC, COMPs
Datasheet - production data
Features
Operating conditions
– Operating power supply: 1.65 to 3.6 V
(without BOR), 1.8 to 3.6 V (with BOR)
– Temp. range: -40 to 85, 105 or 125 °C
Low-power features
– 5 low-power modes: Wait, Low-power run,
Low-power wait, Active-halt with full RTC,
Halt
– Ultra low leakage per I/0: 50 nA
– Fast wake up from Halt mode: 5 µs
Advanced STM8 core
– Harvard architecture and 3-stage pipeline
– Max freq: 16 MHz, 16 CISC MIPS peak
– Up to 40 external interrupt sources
Reset and supply management
– Low-power, ultra safe BOR reset with five
selectable thresholds
– Ultra-low-power POR/PDR
– Programmable voltage detector (PVD)
Clock management
– 32 kHz and 1-16 MHz crystal oscillators
– Internal 16 MHz factory-trimmed RC and
38 kHz low consumption RC
– Clock security system
Low-power RTC
– BCD calendar with alarm interrupt,
– Digital calibration with +/- 0.5ppm accuracy
– LSE security system
– Auto wake up from Halt w/periodic interrupt
– Advanced anti-tamper detection
LCD: 8x40 or 4x44 w/ step-up converter
DMA
– 4 ch. for ADC, AES, DACs, SPIs, I2C,
USARTs, Timers, 1 ch. for memory-to-
memory
AES encryption hardware accelerator
LQFP80
14 x 14 mm
LQFP64
10 x 10 mm
2x12-bit DAC (dual mode) with output buffer
12-bit ADC up to 1 Msps/28 channels
– Temp. sensor and internal ref. voltage
Memories
– Up to 64 KB of Flash memory with up to 2
KB of data EEPROM with ECC and RWW
– Flexible write/read protection modes
– Up to 4 KB of RAM
2 ultra-low-power comparators
– 1 with fixed threshold and 1 rail to rail
– Wake up capability
Timers
– Three 16-bit timers with 2 channels (IC,
OC, PWM), quadrature encoder
– One 16-bit advanced control timer with 3
channels, supporting motor control
– One 8-bit timer with 7-bit prescaler
– One window, one independent watchdog
– Beeper timer with 1, 2 or 4 kHz frequencies
Communication interfaces
– Two synchronous serial interface (SPI)
– Fast I2C 400 kHz SMBus and PMBus
– Three USARTs (ISO 7816 interface + IrDA)
Up to 67 I/Os, all mappable on interrupt vectors
Up to 16 capacitive sensing channels
supporting touchkey, proximity, linear touch
and rotary touch sensors
Fast on-chip programming and non-intrusive
debugging with SWIM, Bootloader using
USART
96-bit unique ID
February 2015
This is information on a product in full production.
DocID17959 Rev 4
1/125
www.st.com

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STM8L162M8 pdf
STM8L162M8 STM8L162R8
List of tables
List of tables
Table 1.
Table 2.
Table 3.
Table 4.
Table 5.
Table 6.
Table 7.
Table 8.
Table 9.
Table 10.
Table 11.
Table 12.
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Table 14.
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Table 18.
Table 19.
Table 20.
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Table 22.
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Table 27.
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Table 29.
Table 30.
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Table 35.
Table 36.
Table 37.
Table 38.
Table 39.
Table 40.
Table 41.
Table 42.
Table 43.
Table 44.
Table 45.
Table 46.
Table 47.
High-density STM8L162x8 low-power device features and peripheral counts . . . . . . . . . . 10
Timer feature comparison . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Legend/abbreviation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
STM8L162x8 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Flash and RAM boundary addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Factory conversion registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
I/O port hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
General hardware register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
CPU/SWIM/debug module/interrupt controller registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Interrupt mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Option byte addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Option byte description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Unique ID registers (96 bits) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
Voltage characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
Current characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
Thermal characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
General operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Embedded reset and power control block characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . 65
Total current consumption in Run mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68
Total current consumption in Wait mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Total current consumption and timing in Low-power run mode at VDD = 1.65 V to 3.6 V . 74
Total current consumption in Low-power wait mode at VDD = 1.65 V to 3.6 V . . . . . . . . . 76
Total current consumption and timing in Active-halt mode
at VDD = 1.65 V to 3.6 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78
Typical current consumption in Active-halt mode, RTC clocked by LSE external crystal . . 80
Total current consumption and timing in Halt mode at VDD = 1.65 to 3.6 V . . . . . . . . . . . 81
Peripheral current consumption . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82
Current consumption under external reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
HSE external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83
LSE external clock characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
HSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84
LSE oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
HSI oscillator characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
LSI oscillator characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87
RAM and hardware registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Flash program and data EEPROM memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
I/O current injection susceptibility . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90
I/O static characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 91
Output driving current (high sink ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93
Output driving current (true open drain ports). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94
Output driving current (PA0 with high sink LED driver capability). . . . . . . . . . . . . . . . . . . . 94
NRST pin characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95
SPI1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
I2C characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100
LCD characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 101
Reference voltage characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 103
TS characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Comparator 1 characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
DocID17959 Rev 4
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STM8L162M8 arduino
STM8L162M8 STM8L162R8
Description
2.3 Ultra-low-power continuum
The ultra-low-power STM8L151x6/8, STM8L152x6/8 and STM8L162x8 are fully pin-to-pin,
software and feature compatible. Besides the full compatibility within the family, the devices
are part of STMicroelectronics microcontrollers ultra-low-power strategy which also includes
STM8L101 line, STM8L151/152 lines, and STM8L162 line. The STM8L and STM32L
families allow a continuum of performance, peripherals, system architecture, and features.
They are all based on STMicroelectronics 0.13 µm ultra low-leakage process.
Note: 1 The STM8L151xx and STM8L152xx are pin-to-pin compatible with STM8L101xx devices.
2 The STM32L family is pin-to-pin compatible with the general purpose STM32F family.
Please refer to STM32L15xx documentation for more information on these devices.
Performance
All families incorporate highly energy-efficient cores with both Harvard architecture and
pipelined execution: advanced STM8 core for STM8L families and ARM® Cortex®-M3 core
for STM32L family. In addition specific care for the design architecture has been taken to
optimize the mA/DMIPS and mA/MHz ratios.
This allows the ultra-low-power performance to range from 5 up to 33.3 DMIPs.
Shared peripherals
STM8L162x8 and STM32L15xxx share identical peripherals which ensure a very easy
migration from one family to another:
Analog peripherals: ADC1, DAC1/DAC2, and comparators COMP1/COMP2
Digital peripherals: RTC and some communication interfaces
Common system strategy
To offer flexibility and optimize performance, the STM8L162x8 and STM32L1xxxx devices
use a common architecture:
Same power supply range from 1.65 to 3.6 V. For STM8L101xx and medium-density
STM8L15xxx, the power supply must be above 1.8 V at power-on, and go below 1.65 V
at power-down.
Architecture optimized to reach ultra low consumption both in low-power modes and
Run mode
Fast startup strategy from low-power modes
Flexible system clock
Ultra safe reset: same reset strategy for both STM8L162x8 and STM32L1xxxx
including power-on reset, power-down reset, brownout reset and programmable
voltage detector.
Features
STMicroelectronics ultra-low-power continuum also lies in feature compatibility:
More than 10 packages with pin counts from 20 to 100 pins and size down to 3 x 3 mm
Memory density ranging from 4 to 128 Kbytes
DocID17959 Rev 4
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