|
|
PDF SRM2B256SLMX Data sheet ( Hoja de datos )
| Número de pieza | SRM2B256SLMX | |
| Descripción | 256K-Bit Static RAM | |
| Fabricantes | S-MOS Systems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SRM2B256SLMX (archivo pdf) en la parte inferior de esta página. Total 14 Páginas | ||
|
No Preview Available !
www.DataSheet4U.com
SRM2B256SLMX55/70/10
256K-BIT STATIC RAM
q Wide Temperature Range
q Extremely Low Standby Current
q Access Time 100ns (2.7V) 55ns (4.5V)
q 32,768 Words × 8-Bit Asynchronous
s DESCRIPTION
The SRM2B256SLMX is a low voltage operating 32,768 words × 8-bit asynchronous, static, random
access memory fabricated using an advanced CMOS technology. Its very low standby power con-
sumption makes it ideal for applications requiring non-volatile storage with back-up batteries, and
–25 to 85°C operating temperature range makes it ideal for industrial use. The asynchronous and
static nature of the memory requires no external clock or refresh circuit. 3-state output ports allow easy
expansion of memory capacity. These features make the SRM2B256SLMX usable for a wide range
of applications, from microprocessor systems to terminal devices.
s FEATURES
• Wide temperature range . . . . . . . . . . . –25 to 85°C
• Extended supply voltage range. . . . . . 2.7 to 5.5V
• Fast access time . . . . . . . . . . . . . . . . . 100ns (3V ± 10%)
55ns (5V ± 10%)
• Extremely low standby current . . . . . . SL Version
• Completely static. . . . . . . . . . . . . . . . . No clock required
• 3-state output
• Battery back-up operation
• Package . . . . . . . . . . . . . . . . . . . . . . . SRM2B256SLCX . . . . . . . . . . . . . . . DIP2-28pin (plastic)
SRM2B256SLMX . . . . . . . . . . . . . . SOP2-28pin (plastic)
SRM2B256SLTMX . . . . . . . . . . . TSOP (I)-28pin (plastic)
SRM2B256SLRMX. . . . . . . . TSOP (I)-28pin-R1 (plastic)
000-97-MEM-1.0 S-MOS Systems, Inc. • 150 River Oaks Parkway • San Jose, CA 95134 • Tel: (408) 922-0200 • Fax: (408) 922-0238 57
1 page  
www.DataSheet4U.com
SRM2B256SLMX55/70/10
s ELECTRICAL CHARACTERISTICS
q DC Electrical Characteristics
(VSS = 0V, Ta = –25 to 85°C)
Parameter Symbol
Conditions
VDD = 3V±10%
VDD = 5V±10%
Unit
Min Typ*1 Max Min Typ*2 Max
Input leakage
ILI
VI = 0 to VDD
–1 — 1 –1 — 1 µA
Standby supply
current
IDDS
IDDS1
CS = VIH
CS ≥ VDD – 0.2V
— — 2 — — 3.0 mA
— 0.3 25 — 0.5 50 µA
Average operating
current
IDDA
IDDA1
VI = VIL, VIH
II/O = 0mA, tCYC = Min
VI = VIL, VIH
II/O = 0mA, tCYC = 1µs
— 10 15 — 30 45 mA
— — 5 — — 10 mA
Operating supply
current
IDDO
VI = VIL, VIH
ILO = 0mA
— — 5 — — 10 mA
Output leakage
ILO
CS = VIH or WE = VIL
or OE = VIH, VI/O = 0 to VDD
–1
—
1
–1 —
1 µA
High level output
voltage
VOH IOH = –1.0mA, –0.5mA*3 2.4 — — 2.4 — — V
Low level output
voltage
VOL
IOL = 2.1mA, 1.0mA*3
— — 0.4 — — 0.4 V
*1 Typical values are measured at Ta = 25°C and VDD = 3.0V
*2 Typical values are measured at Ta = 25°C and VDD = 5.0V
*3 VDD = 3.0V±10%
q Terminal Capacitance
Parameter
Address capacitance
Input capacitance
I/O capacitance
Symbol
CADD
CI
CI/O
Conditions
VADD = 0V
VI = 0V
VI/O = 0V
(f = 1MHz, Ta = 25°C)
Min Typ Max Unit
— — 8 pF
— — 8 pF
— — 10 pF
000-97-MEM-1.0 S-MOS Systems, Inc. • 150 River Oaks Parkway • San Jose, CA 95134 • Tel: (408) 922-0200 • Fax: (408) 922-0238 61
5 Page 
www.DataSheet4U.com
SRM2B256SLMX55/70/10
s FUNCTIONS
q Truth Table
CS OE WE
HXX
LXL
L LH
L HH
X: “H” or “L”
—: “H”, “L”, or “Hi-Z”
A0 to A14
—
Stable
Stable
Stable
Data I/O
Hi-Z
DIN
DOUT
Hi-Z
Mode
Standby
Write
Read
Output disable
IDD
IDDS, IDDS1
IDDA, IDDA1
IDDA, IDDA1
IDDA, IDDA1
q Read Mode
The data appear when the address is set while holding CS = “L”, OE = “L” and WE = “H”. When OE
= “H”, DATA I/O terminals are in high impedance state, that makes circuit design and bus control easy.
q Write Mode
There are the following 3 ways of writing data into memory:
(1) Hold CS = “L” and WE = “L”, set address
(2) Hold CS = “L” then set address and give “L” pulse to WE.
(3) After setting addresses, give “L” pulse to both CS and WE.
In case the above data on the DATA I/O terminals is latched up into the chip when CS or WE is in
positive-going. Since DATA I/O terminals are high impedance when CS or OE = “H”, bus contention
between data driver and memory outputs can be avoided.
q Standby Mode
When CS is “H”, the chip is in the standby mode. In this mode, DATA I/O terminals are high imped-
ance and all inputs of addresses, WE and data can be any “H” or “L”. When CS is over VDD–0.2V,
the chip is in the data retention battery backup mode. In this case, there is a small current in the chip
which flows through the high resistances of the memory cells.
000-97-MEM-1.0 S-MOS Systems, Inc. • 150 River Oaks Parkway • San Jose, CA 95134 • Tel: (408) 922-0200 • Fax: (408) 922-0238 67
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet SRM2B256SLMX.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| SRM2B256SLMT | 256K-Bit Static RAM |  Epson |
| SRM2B256SLMX | 256K-Bit Static RAM | S-MOS Systems |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |