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PDF SRM2B256SLMT Data sheet ( Hoja de datos )
| Número de pieza | SRM2B256SLMT | |
| Descripción | 256K-Bit Static RAM | |
| Fabricantes | Epson | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de SRM2B256SLMT (archivo pdf) en la parte inferior de esta página. Total 7 Páginas | ||
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PF857-02
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SRM2B256SLMT55/70/10
WOiPdpreeorVdaoutilcottansge
256K-Bit Static RAM
q Wide Temperature Range
q Extremely Low Standby Current
q Access Time 100ns (2.7V) /55ns (4.5V)
s DESCRIPTION
q 32,768 Words x 8-bit Asynchronous
The SRM2B256SLMT is a low voltage operating 32,768 words!8-bit asynchronous, static, random access
memory fabricated using an advanced CMOS technology. Its very low standby power consumption makes it
ideal for applications requiring non-volatile storage with back-up batteries. And –40 to 85°C operating temperature
range makes it ideal for industrial use. The asynchronous and static nature of the memory requires no external
clock or refresh circuit. Output ports are 3-state output allows easy
expansion of memory capacity. These features makes the s PIN CONFIGURATION
SRM2B256SLMT usable for wide range of applications from
microprocesser systems to terminal devices.
s FEATURES
q Wide temperature range ................... –40 to 85°C
q Extended supply voltage range ......... 2.7 to 5.5V
q Fast access time ............................... 100ns (3V±10%)
55ns (5V±10%)
q Extremely low standby current .......... SL Version
q Completely static ............................... no clock required
(DIP/SOP2)
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O1 11
I/O2 12
I/O3 13
VSS 14
28 VDD
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CS
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
q 3-state output
q Battery back-up operation
q Package .............. SRM2B256SLCT DIP2-28pin (plastic)
SRM2B256SLMT SOP2-28pin (plastic)
SRM2B256SLTMT TSOP (I) -28pin (plastic)
SRM2B256SLRMT TSOP (I) -28pin-R1 (plastic)
s BLOCK DIAGRAM
(TSOP)
OE 22
A11 23
A9 24
A8 25
A13 26
WE 27
VDD 28
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
SRM2B256SLTMT
21 A10
20 CS
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
14 VSS
13 I/O3
12 I/O2
11 I/O1
10 A0
9 A1
8 A2
A0
A1
A2
A3
A4
A5
9 512 Memory Cell Array
512!64!8
A6
A7
A8
A9
A10 64!8
A11
A12
A13 6 64 Column Gate
A14
(TSOP-R1)(Reverse bending)
A3 7
A4 6
A5 5
A6 4
A7 3
A12 2
A14 1
VDD 28
WE 27
A13 26
A8 25
A9 24
A11 23
OE 22
SRM2B256SLRMT
8 A2
9 A1
10 A0
11 I/O1
12 I/O2
13 I/O3
14 VSS
15 I/O4
16 I/O5
17 I/O6
18 I/O7
19 I/O8
20 CS
21 A10
CS 8 s PIN DESCRIPTION
A0 to A14 Address Input
WE Write Enable
OE OE Output Enable
I/O Buffer
WE CS Chip Select
I/O1 to I/O8 Data Input/Output
VDD Power Supply (2.7 to 5.5V)
I/O1 I/O2 I/O3 I/O4 I/O5 I/O6 I/O7 I/O8
VSS Power Supply (0V)
1
1 page  
s PACKAGE DIMENSIONS
Plastic DIP-28pin
28
37.4max
(1.472max)
36.7±0.1
(1.445
+0.003
–0.004
)
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SRM2B256SLMT 55/70/10
15
1 14
1.5
(0.059)
Plastic TSOP(I)-28pin
13.4±0.3
(0.528
)+0.011
–0.012
11.8±0.2
(0.465
)+0.007
–0.008
22
INDEX
28
1
21
78
2.54
(0.1)
0°
10°
0.46±0.1
(0.018)
0°
15°
15.24
(0.6)
(00..0215+–±000...00000512 )
Plastic TSOP(I)-28pin-R1
13.4±0.3
(0.528
)+0.011
–0.012
11.8±0.2
(0.465
)+0.007
–0.008
7
INDEX
1
28
8
22 21
Unit : mm
(inch)
0°
10°
0.15±0.1
(0.006
)+0.003
–0.004
0.5±0.1
(0.02
+0.003
–0.004
)
0.8
(0.031)
0.55
(0.022)
0.2±0.1
(0.008
+0.003
–0.004
)
Unit : mm
(inch)
0.15±0.1
(0.006
+0.003
–0.004
)
0.5±0.1
(0.02
+0.003
–0.004
)
0.8
(0.031)
0.55
(0.022)
0.2±0.1
(0.008
)+0.003
–0.004
Unit : mm
(inch)
Plastic SOP2-28pin
18.1max
(0.712max)
17.8±0.1
(0.701
+0.003
–0.004
)
28 15
1 14
1.27
(0.05)
0.4±0.1
(0.016
+0.003
–0.004
)
0°
10°
0.15±0.05
(0.006
+0.001
–0.002
)
1±0.3
(0.039
)+0.012
–0.011
1.7
(0.067)
Unit : mm
(inch)
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet SRM2B256SLMT.PDF ] | |
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