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Número de pieza | NTMFS4108N | |
Descripción | Power MOSFET ( Transistor ) | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! NTMFS4108N
Power MOSFET
30 V, 35 A, Single N−Channel,
SO−8 Flat Lead Package
Features
• Thermally and Electrically Enhanced Packaging Compatible with
Standard SO−8 Package Footprint
• New Package Provides Capability of Inspection and Probe After
Board Mounting
• Ultra Low RDS(on) (at 4.5 VGS), Low Gate Resistance and Low QG
• Optimized for Low Side Synchronous Applications
• High Speed Switching Capability
Applications
• Notebook Computer Vcore Applications
• Network Applications
• DC−DC Converters
MAXIMUM RATINGS (TJ = 25°C unless otherwise noted)
Rating
Symbol Value Unit
Drain−to−Source Voltage
Gate−to−Source Voltage
Continuous Drain
Current (Note 1)
Steady
State
Power Dissipation
(Note 1)
t v10 s
Steady
State
t v10 s
TA = 25°C
TA = 85°C
TA = 25°C
TA = 25°C
VDSS
VGS
ID
PD
30
$20
22
16
35
2.4
6.25
V
V
A
W
Continuous Drain
Current (Note 2)
Power Dissipation
(Note 2)
Steady
State
TA = 25°C
TA = 85°C
TA = 25°C
ID
PD
13.5 A
10
0.91 W
Pulsed Drain Current
tp = 10 ms
Operating Junction and Storage Temperature
IDM
TJ, Tstg
106
−55 to
150
A
°C
Continuous Source Current (Body Diode)
Single Pulse Drain−to−Source Avalanche
Energy (VDD = 25 V, VGS = 10 V, IPK = 30 A,
L = 1 mH, RG = 25 W)
Lead Temperature for Soldering Purposes
(1/8″ from case for 10 s)
IS 6.0 A
EAS 450 mJ
TL 260 °C
Maximum ratings are those values beyond which device damage can occur.
Maximum ratings applied to the device are individual stress limit values (not
normal operating conditions) and are not valid simultaneously. If these limits are
exceeded, device functional operation is not implied, damage may occur and
reliability may be affected.
1. Surface−mounted on FR4 board using 1″ sq. pad size
(Cu area = 1.127″ sq. [1 oz] including traces).
2. Surface−mounted on FR4 board using the minimum recommended pad size
(Cu area = 0.412″ sq.).
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V(BR)DSS
30 V
RDS(on) TYP
1.8 mW @ 10 V
2.7 mW @ 4.5 V
ID MAX
35 A
D
G
S
1
SO−8 FLAT LEAD
CASE 488AA
STYLE 1
MARKING
DIAGRAM
D
S
S 4108N
S AYWWG
GG
D
D
D
4108N = Specific Device Code
A = Assembly Location
Y = Year
WW = Work Week
G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Device
Package
Shipping†
NTMFS4108NT1G SO−8 FL 1500 Tape / Reel
(Pb−Free)
NTMFS4108NT3G SO−8 FL 5000 Tape / Reel
(Pb−Free)
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2005
September, 2005 − Rev. 1
1
Publication Order Number:
NTMFS4108N/D
1 page NTMFS4108N
PACKAGE DIMENSIONS
SO−8 FLAT LEAD (DFN6)
CASE 488AA−01
ISSUE B
D
2
D1
6
2X
0.20 C
A
B 2X
5 0.20 C
E1
2E
c
1 2 34
TOP VIEW
0.10 C
0.10 C
SIDE VIEW
A
DETAIL A
8X b
0.10 C A B
0.05 c L
1
e/2
4
K
4X
q
A1
3X
e
DETAIL A
C
SEATING
PLANE
E2
L1 M
65
G D2
BOTTOM VIEW
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NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION D1 AND E1 DO NOT INCLUDE
MOLD FLASH PROTRUSIONS OR GATE
BURRS.
MILLIMETERS
DIM MIN NOM MAX
A 0.90 0.99 1.20
A1 0.00 −−− 0.05
b 0.33 0.41 0.51
c 0.23 0.28 0.33
D 5.15 BSC
D1 4.50 4.90 5.10
D2 3.50 −−− 4.22
E 6.15 BSC
E1 5.50 5.80 6.10
E2 3.45 −−− 4.30
e 1.27 BSC
G 0.51 0.61 0.71
K 0.51 −−− −−−
L 0.51 0.61 0.71
L1 0.05 0.17 0.20
M 3.00 3.40 3.80
q 0 _ −−− 12 _
STYLE 1:
PIN 1. SOURCE
2. SOURCE
3. SOURCE
4. GATE
5. DRAIN
6. DRAIN
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PDF Descargar | [ Datasheet NTMFS4108N.PDF ] |
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NTMFS4108N | Power MOSFET ( Transistor ) | ON Semiconductor |
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