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Número de pieza | TMP89FM46 | |
Descripción | 8 Bit Microcontroller | |
Fabricantes | Toshiba Semiconductor | |
Logotipo | ||
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8 Bit Microcontroller
TLCS-870/C1 Series
TMP89FM46
1 page Table of Contents
TMP89FM46
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
www.DataShee1t4.U4.comPin Names and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. CPU Core
2.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Memory space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1 Code area ................................................................................................................................................. 9
2.2.1.1 RAM
2.2.1.2 BOOTROM
2.2.1.3 Flash
2.2.2 Data area ................................................................................................................................................ 12
2.2.2.1 SFR
2.2.2.2 RAM
2.2.2.3 BOOTROM
2.2.2.4 Flash
2.3 System clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.1 Configuration .......................................................................................................................................... 15
2.3.2 Control .................................................................................................................................................... 15
2.3.3 Functions ................................................................................................................................................ 17
2.3.3.1 Clock generator
2.3.3.2 Clock gear
2.3.3.3 Timing generator
2.3.4 Warm-up counter .................................................................................................................................... 20
2.3.4.1 Warm-up counter operation when the oscillation is enabled by the hardware
2.3.4.2 Warm-up counter operation when the oscillation is enabled by the software
2.3.5 Operation mode control circuit ................................................................................................................ 22
2.3.5.1 Single-clock mode
2.3.5.2 Dual-clock mode
2.3.5.3 STOP mode
2.3.5.4 Transition of operation modes
2.3.6 Operation Mode Control ......................................................................................................................... 27
2.3.6.1 STOP mode
2.3.6.2 IDLE1/2 and SLEEP1 modes
2.3.6.3 IDLE0 and SLEEP0 modes
2.3.6.4 SLOW mode
2.4 Reset Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.4.1 Configuration .......................................................................................................................................... 38
2.4.2 Control .................................................................................................................................................... 38
2.4.3 Functions ................................................................................................................................................ 40
2.4.4 Reset Signal Generating Factors............................................................................................................ 41
2.4.4.1
2.4.4.2
2.4.4.3
2.4.4.4
2.4.4.5
2.4.4.6
2.4.4.7
2.4.4.8
2.4.4.9
External reset input (RESET pin input)
Power-on reset
Voltage detection reset
Watchdog timer reset
System clock reset
Trimming data reset
Flash standby reset
Internal factor reset detection status register
How to use the external reset input pin as a port
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5 Page 18.5.1 Device initialization ............................................................................................................................. 266
18.5.2 Start condition and slave address generation..................................................................................... 266
18.5.3 1-word data transfer............................................................................................................................ 267
18.5.3.1 When SBI0SR2<MST> is "1" (Master mode)
18.5.3.2 When SBI0SR2<MST> is "0" (Slave mode)
18.5.4 Stop condition generation ................................................................................................................... 271
18.5.5 Restart ................................................................................................................................................ 271
18.6 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
273
19. Key-on Wakeup (KWU)
19.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 275
19.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 276
19.3 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 277
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20. 10-bit AD Converter (ADC)
20.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.3 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.3.1 Single mode........................................................................................................................................ 284
20.3.2 Repeat mode ...................................................................................................................................... 284
20.3.3 AD operation disable and forced stop of AD operation....................................................................... 285
20.4 Register Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.5 Starting STOP/IDLE0/SLOW Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.6 Analog Input Voltage and AD Conversion Result . . . . . . . . . . . . . . . . . . . . . . .
20.7 Precautions about the AD Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.7.1 Analog input pin voltage range ........................................................................................................... 288
20.7.2 Analog input pins used as input/output ports ...................................................................................... 288
20.7.3 Noise countermeasure........................................................................................................................ 288
279
280
284
286
286
287
288
21. Flash Memory
21.1 Flash Memory Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.2 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.2.1 Flash memory command sequence execution and toggle control (FLSCR1 <FLSMD>) ................... 293
21.2.2 Flash memory area switching (FLSCR1<FAREA>)............................................................................ 294
21.2.3 RAM area switching (SYSCR3<RAREA>).......................................................................................... 295
21.2.4 BOOTROM area switching (FLSCR1<BAREA>)................................................................................ 295
21.2.5 Flash memory standby control (FLSSTB<FSTB>) ............................................................................. 296
21.2.6 Port input control register (SPCR<PIN0, PIN1>) ................................................................................ 297
21.3 Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.3.1 Byte program ...................................................................................................................................... 298
21.3.2 Sector erase (4-kbyte partial erase) ................................................................................................... 299
21.3.3 Chip erase (all erase) ......................................................................................................................... 299
21.3.4 Product ID entry .................................................................................................................................. 300
21.3.5 Product ID exit .................................................................................................................................... 300
21.3.6 Security program ................................................................................................................................ 300
21.4 Toggle Bit (D6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.5 Access to the Flash Memory Area. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.5.1 Flash memory control in serial PROM mode ...................................................................................... 301
21.5.1.1 How to transfer and write a control program to the RAM area in RAM loader mode of the serial PROM mode
21.5.2 Flash memory control in MCU mode .................................................................................................. 304
21.5.2.1 How to write to the flash memory by transferring a control program to the RAM area
21.5.2.2 How to write to the flash memory by using a support program (API) of BOOTROM
290
293
298
300
301
vii
11 Page |
Páginas | Total 70 Páginas | |
PDF Descargar | [ Datasheet TMP89FM46.PDF ] |
Número de pieza | Descripción | Fabricantes |
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