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PDF TMP89FH42 Data sheet ( Hoja de datos )

Número de pieza TMP89FH42
Descripción 8 Bit Microcontroller
Fabricantes Toshiba Semiconductor　
Logotipo Toshiba Semiconductor Logotipo



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No Preview Available ! TMP89FH42 Hoja de datos, Descripción, Manual

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8 Bit Microcontroller
TLCS-870/C1 Series
TMP89FH42

1 page




TMP89FH42 pdf
Table of Contents
TMP89FH42
1.1 Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
1.2 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
1.3 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
www.DataShee1t4.U4.comPin Names and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2. CPU Core
2.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2 Memory space . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.2.1 Code area ................................................................................................................................................. 9
2.2.1.1 RAM
2.2.1.2 BOOTROM
2.2.1.3 Flash
2.2.2 Data area ................................................................................................................................................ 12
2.2.2.1 SFR
2.2.2.2 RAM
2.2.2.3 BOOTROM
2.2.2.4 Flash
2.3 System clock controller . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.3.1 Configuration .......................................................................................................................................... 15
2.3.2 Control .................................................................................................................................................... 15
2.3.3 Functions ................................................................................................................................................ 17
2.3.3.1 Clock generator
2.3.3.2 Clock gear
2.3.3.3 Timing generator
2.3.4 Warm-up counter .................................................................................................................................... 20
2.3.4.1 Warm-up counter operation when the oscillation is enabled by the hardware
2.3.4.2 Warm-up counter operation when the oscillation is enabled by the software
2.3.5 Operation mode control circuit ................................................................................................................ 22
2.3.5.1 Single-clock mode
2.3.5.2 Dual-clock mode
2.3.5.3 STOP mode
2.3.5.4 Transition of operation modes
2.3.6 Operation Mode Control ......................................................................................................................... 27
2.3.6.1 STOP mode
2.3.6.2 IDLE1/2 and SLEEP1 modes
2.3.6.3 IDLE0 and SLEEP0 modes
2.3.6.4 SLOW mode
2.4 Reset Control Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
2.4.1 Configuration .......................................................................................................................................... 38
2.4.2 Control .................................................................................................................................................... 38
2.4.3 Functions ................................................................................................................................................ 40
2.4.4 Reset Signal Generating Factors............................................................................................................ 41
2.5
2.4.4.1 External reset input (RESET pin input)
2.4.4.2 Power-on reset
2.4.4.3 Voltage detection reset
2.4.4.4 Watchdog timer reset
2.4.4.5 System clock reset
2.4.4.6 Trimming data reset
2.4.4.7 Flash standby reset
2.4.4.8 Internal factor reset detection status register
2.4.4.9 How to use the external reset input pin as a port
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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TMP89FH42 arduino
18.4.8 Interrupt service request and release ................................................................................................. 274
18.4.9 Setting of serial bus interface mode ................................................................................................... 274
18.4.10 Software reset................................................................................................................................... 274
18.4.11 Arbitration lost detection monitor ...................................................................................................... 275
18.4.12 Slave address match detection monitor............................................................................................ 276
18.4.13 GENERAL CALL detection monitor .................................................................................................. 277
18.4.14 Last received bit monitor................................................................................................................... 277
18.4.15 Slave address and address recognition mode specification ............................................................. 277
18.5 Data Transfer of I2C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18.5.1 Device initialization ............................................................................................................................. 278
18.5.2 Start condition and slave address generation..................................................................................... 278
18.5.3 1-word data transfer............................................................................................................................ 279
18.5.3.1 When SBI0SR2<MST> is "1" (Master mode)
18.5.3.2 When SBI0SR2<MST> is "0" (Slave mode)
18.5.4 Stop condition generation ................................................................................................................... 283
18.5.5 Restart ................................................................................................................................................ 283
www.DataShee1t48U..6comAC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
18.7 Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
278
285
287
19. Key-on Wakeup (KWU)
19.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 289
19.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 290
19.3 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 291
20. 10-bit AD Converter (ADC)
20.1 Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.2 Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.3 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.3.1 Single mode........................................................................................................................................ 298
20.3.2 Repeat mode ...................................................................................................................................... 298
20.3.3 AD operation disable and forced stop of AD operation....................................................................... 299
20.4 Register Setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.5 Starting STOP/IDLE0/SLOW Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.6 Analog Input Voltage and AD Conversion Result . . . . . . . . . . . . . . . . . . . . . . .
20.7 Precautions about the AD Converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
20.7.1 Analog input pin voltage range ........................................................................................................... 302
20.7.2 Analog input pins used as input/output ports ...................................................................................... 302
20.7.3 Noise countermeasure........................................................................................................................ 302
293
294
298
300
300
301
302
21. Flash Memory
21.1 Flash Memory Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.2 Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.2.1 Flash memory command sequence execution and toggle control (FLSCR1 <FLSMD>) ................... 307
21.2.2 Flash memory area switching (FLSCR1<FAREA>)............................................................................ 308
21.2.3 RAM area switching (SYSCR3<RAREA>).......................................................................................... 309
21.2.4 BOOTROM area switching (FLSCR1<BAREA>)................................................................................ 309
21.2.5 Flash memory standby control (FLSSTB<FSTB>) ............................................................................. 310
21.2.6 Port input control register (SPCR<PIN0, PIN1>) ................................................................................ 311
21.3 Command Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
21.3.1 Byte program ...................................................................................................................................... 312
21.3.2 Sector erase (4-kbyte partial erase) ................................................................................................... 313
21.3.3 Chip erase (all erase) ......................................................................................................................... 313
304
307
312
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