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PDF LT5538 Data sheet ( Hoja de datos )
| Número de pieza | LT5538 | |
| Descripción | 40MHz to 3.8GHz RF Power Detector | |
| Fabricantes | Linear Technology | |
| Logotipo |  |
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FEATURES
■ Frequency Range: 40MHz to 3.8GHz
■ 75dB Log Linear Dynamic Range
■ Exceptional Accuracy over Temperature
■ Linear DC Output vs. Input Power in dBm
■ –72dBm Detection Sensitivity
■ Single-ended RF Input
■ Low Supply Current: 29mA
■ Supply Voltage: 3V to 5.25V
■ 8-lead DFN 3mm × 3mm package
APPLICATIONS
■ Received Signal Strength Indication (RSSI)
■ RF Power Measurement and Control
■ RF/IF Power Detection
■ Receiver RF/IF Gain Control
■ Envelope Detection
■ ASK Receiver
LT5538www.DataSheet4U.com
40MHz to 3.8GHz
RF Power Detector with
75dB Dynamic Range
DESCRIPTION
The LT®5538 is a 40MHz to 3800MHz monolithic logarith-
mic RF power detector, capable of measuring RF signals
over a wide dynamic range, from –75dBm to 10dBm. The
RF signal in an equivalent decibel-scaled value is precisely
converted into DC voltage on a linear scale. The wide linear
dynamic range is achieved by measuring the RF signal us-
ing cascaded RF limiters and RF detectors. Their outputs
are summed to generate an accurate linear DC voltage
proportional to the input RF signal in dBm. The LT5538
delivers superior temperature stable output (within ±1dB
over full temperature range) from 40MHz to 3.8GHz. The
output is buffered with a low impedance driver.
, LT, LTC and LTM are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
40MHz - 3.8GHz Logarithmic RF Detector
RF
INPUT
EN
1nF
56 1nF
LT5538
ENBL
OUT
IN+ CAP+
IN– CAP–
GND VCC
9 5538 TA01
100pF
VOUT
5V
0.1μF
Output Voltage and Linearity Error
vs Input Power
2.0
VCC = 5V AT 880 MHz
1.7
3
2
1.4 1
1.1 0
0.8 –1
0.5 TA = –40°C
TA = 25°C
TA = 85°C
0.2
–75 –65 –55 –45 –35 –25 –15 –5 5
INPUT POWER (dBm)
–2
–3
5538 TA02
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1
1 page  
LT5538www.DataSheet4U.com
TYPICAL PERFORMANCE CHARACTERISTICS (Test Circuit shown in Figure 5)
Supply Current vs Supply Voltage
40
35
30
25
20
15
10
2.5
TA = –40°C
TA = 25°C
TA = 85°C
3 3.5 4 4.5 5
SUPPLY VOLTAGE VCC (V)
5.5
5538 G01
Output Voltage, Linearity Error vs
Input Power at 450MHz
2.0
VCC = 5V
3
1.7 2
1.4 1
1.1 0
0.8 –1
0.5 TA = –40°C
TA = 25°C
TA = 85°C
0.2
–75 –65 –55 –45 –35 –25 –15 –5 5
INPUT POWER (dBm)
–2
–3
5538 G04
VOUT Variation vs Input Power at
880MHz
3
VCC = 5V
NORMALIZED AT 25°C
2
1
0
–1
–2
TA = –40°C
–3 TA = 85°C
–75 –65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–5
5
5538 G07
Output Voltage, Linearity Error vs
Input Power at 40MHz
2.0
VCC = 5V
3
1.7 2
1.4 1
1.1 0
0.8 –1
0.5 TA = –40°C
TA = 25°C
0.2 TA = 85°C
–75 –65 –55 –45 –35 –25 –15 –5 5
INPUT POWER (dBm)
–2
–3
5538 G02
VOUT Variation vs Input Power at
450MHz
3
VCC = 5V
NORMALIZED AT 25°C
2
1
0
–1
–2
TA = –40°C
–3 TA = 85°C
–75 –65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–5
5
5538 G05
Output Voltage, Linearity Error vs
Input Power at 2.14GHz
2.0
VCC = 5V
3
1.7 2
1.4 1
1.1 0
0.8 –1
0.5 TA = –40°C
TA = 25°C
TA = 85°C
0.2
–75 –65 –55 –45 –35 –25 –15 –5
INPUT POWER (dBm)
5
–2
–3
5538 G08
VOUT Variation vs Input Power at
40MHz
3
VCC = 5V
NORMALIZED AT 25°C
2
1
0
–1
–2
TA = –40°C
–3 TA = 85°C
–75 –65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–5
5
5538 G03
Output Voltage, Linearity Error vs
Input Power at 880MHz
2.0
VCC = 5V
3
1.7 2
1.4 1
1.1 0
0.8 –1
0.5 TA = –40°C
TA = 25°C
TA = 85°C
0.2
–75 –65 –55 –45 –35 –25 –15 –5 5
INPUT POWER (dBm)
–2
–3
5538 G06
VOUT Variation vs Input Power at
2.14GHz
3
VCC = 5V
NORMALIZED AT 25°C
2
1
0
–1
–2
TA = –40°C
–3 TA = 85°C
–75 –65 –55 –45 –35 –25 –15
INPUT POWER (dBm)
–5
5
5538 G09
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5
5 Page 
TEST CIRCUIT
LT5538www.DataSheet4U.com
5538 TC02
Figure 7. Component Side of Evalution Board
PACKAGE DESCRIPTION
DD Package
8-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1698)
0.675 ±0.05
R = 0.115
TYP
5
0.38 ± 0.10
8
3.5 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
PACKAGE
OUTLINE
0.25 ± 0.05
0.50
BSC
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
PIN 1
TOP MARK
(NOTE 6)
0.200 REF
3.00 ±0.10
(4 SIDES)
1.65 ± 0.10
(2 SIDES)
0.75 ±0.05
0.00 – 0.05
4
0.25 ± 0.05
(DD8) DFN 1203
1
0.50 BSC
2.38 ±0.10
(2 SIDES)
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-1)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION
ON TOP AND BOTTOM OF PACKAGE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
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11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet LT5538.PDF ] | |
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