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PDF HT68F60 Data sheet ( Hoja de datos )
| Número de pieza | HT68F60 | |
| Descripción | (HT68F20 - HT68F60) Enhanced I/O Flash Type MCU 8-Bit MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de HT68F60 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
Enhanced I/O Flash Type MCU 8-Bit MCU with EEPROM
Technical Document
· Application Note
- HA0075E MCU Reset and Oscillator Circuits Application Note
Features
CPU Features
· Operating Voltage:
fSYS= 8MHz: 2.2V~5.5V
fSYS= 12MHz: 2.7V~5.5V
fSYS= 20MHz: 4.5V~5.5V
· Up to 0.2ms instruction cycle with 20MHz system
clock at VDD=5V
· Power down and wake-up functions to reduce power
consumption
· Five oscillators:
External Crystal - HXT
External 32.768kHz Crystal - LXT
External RC - ERC
Internal RC - HIRC
Internal 32kHz RC - LIRC
· Multi-mode operation: NORMAL, SLOW, IDLE and
SLEEP
· Fully integrated internal 4MHz, 8MHz and 12MHz
oscillator requires no external components
· All instructions executed in one or two instruction
cycles
· Table read instructions
· 63 powerful instructions
· Up to 12-level subroutine nesting
· Bit manipulation instruction
Peripheral Features
· Flash Program Memory: 1K´14 ~ 12K´16
· RAM Data Memory: 64´8 ~ 576´8
· EEPROM Memory: 32´8~256´8
· Watchdog Timer function
· Up to 50 bidirectional I/O lines
· Software controlled 4-SCOM lines LCD driver with
1/2 bias
· Multiple pin-shared external interrupts
· Multiple Timer Module for time measure, input
capture, compare match output, PWM output or
single pulse output function
· Serial Interfaces Module - SIM for SPI or I2C
· Dual Comparator functions
· Dual Time-Base functions for generation of fixed time
interrupt signals
· Low voltage reset function
· Low voltage detect function
· Wide range of available package types
General Description
The HT68FXX series of devices are Flash Memory I/O
www.DataSheet4Uty.cpoem8-bit high performance RISC architecture
microcontrollers. Offering users the convenience of Flash
Memory multi-programming features, these devices also
include a wide range of functions and features. Other
memory includes an area of RAM Data Memory as well as
an area of EEPROM memory for storage of non-volatile
data such as serial numbers, calibration data etc.
Multiple and extremely flexible Timer Modules provide
timing, pulse generation and PWM generation func-
tions. Analog features include dual comparator func-
tions. Communication with the outside world is catered
for by including fully integrated SPI or I2C interface func-
tions, two popular interfaces which provide designers
with a means of easy communication with external pe-
ripheral hardware. Protective features such as an inter-
nal Watchdog Timer, Low Voltage Reset and Low
Voltage Detector coupled with excellent noise immunity
and ESD protection ensure that reliable operation is
maintained in hostile electrical environments.
A full choice of HXT, LXT, ERC, HIRC and LIRC oscilla-
tor functions are provided including a fully integrated
system oscillator which requires no external compo-
nents for its implementation. The ability to operate and
switch dynamically between a range of operating
modes using different clock sources gives users the
ability to optimise microcontroller operation and mini-
mise power consumption.
The inclusion of flexible I/O programming features,
Time-Base functions along with many other features en-
sure that the devices will find excellent use in applica-
tions such as electronic metering, environmental
monitoring, handheld instruments, household appli-
ances, electronically controlled tools, motor driving in
addition to many others.
Rev. 1.00
1 November 3, 2009
1 page  
HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
P A 0 /C 0 X /T P 0 _ 0
VSS
P B 4 /X T 2
P B 3 /X T 1
P B 2 /O S C 2
P B 1 /O S C 1
VDD
P B 0 /R E S
P C 1 /T P 1 B _ 1 /S C O M 1
P C 0 /T P 1 B _ 0 /S C O M 0
P C 7 /[T P 1 A ]/S C O M 3
P C 6 /[T P 0 _ 0 ]/S C O M 2
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 2 /[T C K 0 ]/[S D I/S D A ]
1
2
3
4
5
6
7
8
9
10
11
12
13
14
2 8 P A 1 /T P 1 A
2 7 P A 2 /T C K 0 /C 0 +
2 6 P A 3 /IN T 0 /C 0 -
2 5 P A 4 /IN T 1 /T C K 1
2 4 P A 5 /C 1 X /S D O
2 3 P A 6 /S D I/S D A
2 2 P A 7 /S C K /S C L
2 1 P B 5 /S C S
2 0 P C 2 /T C K 2 /P C K /C 1 +
1 9 P C 3 /P IN T /T P 2 _ 0 /C 1 -
1 8 P C 4 /[IN T 0 ]/[P IN T ]/T C K 3 /T P 2 _ 1
1 7 P C 5 /[IN T 1 ]/T P 0 _ 1 /T P 1 B _ 2 /[P C K ]
1 6 P D 0 /[T C K 2 ]/T P 3 _ 1 /[S C S ]
1 5 P D 1 /[T P 2 _ 0 ]/[S D O ]/[S C K /S C L ]
H T68F50
2 8 S K D IP -A /S O P -A /S S O P -A
P B 5 /S C S
P A 7 /S C K /S C L
P A 6 /S D I/S D A
P A 5 /C 1 X /S D O
P A 4 /IN T 1 /T C K 1
P A 3 /IN T 0 /C 0 -
P A 2 /T C K 0 /C 0 +
P A 1 /T P 1 A
P A 0 /C 0 X /T P 0 _ 0
P F 1 /[C 1 X ]
40 39 38 37 36 35 34 33 32 31
1 30
2 29
3 28
4 27
5
H T68F50
26
6
4 0 Q F N -A
25
7 24
8 23
9 22
10 21
11 12 13 14 1516 17 18 19 20
P D 2 /[T C K 0 ]/[S D I/S D A ]
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
P E 4 /[T P 1 B _ 2 ]
P E 5 /[T P 3 _ 0 ]
P A 0 /C 0 X /T P 0 _ 0
P F 1 /[C 1 X ]
P F 0 /[C 0 X ]
P E 7 /[IN T 1 ]
P E 6 /[IN T 0 ]
VSS
P B 4 /X T 2
P B 3 /X T 1
P B 2 /O S C 2
P B 1 /O S C 1
VDD
P B 0 /R E S
P E 5 /[T P 3 _ 0 ]
P E 4 /[T P 1 B _ 2 ]
P C 1 /T P 1 B _ 1 /S C O M 1
P C 0 /T P 1 B _ 0 /S C O M 0
NC
P C 7 /[T P 1 A ]/S C O M 3
P C 6 /[T P 0 _ 0 ]/S C O M 2
P E 3 /[T P 3 _ 1 ]
PE2
PE1
PE0
P D 5 /[T P 0 _ 1 ]
1 48
2 47
3 46
4 45
5 44
6 43
7 42
8 41
9 40
10 39
11 38
12 37
13 36
14 35
15 34
16 33
17 32
18 31
19 30
20 29
21 28
22 27
23 26
24 25
H T68F50
4 8 S S O P -A
P A 1 /T P 1 A
P A 2 /T C K 0 /C 0 +
P A 3 /IN T 0 /C 0 -
P A 4 /IN T 1 /T C K 1
P A 5 /C 1 X /S D O
P A 6 /S D I/S D A
P A 7 /S C K /S C L
P B 5 /S C S
P B 6 /[S D O ]
P B 7 /[S D I/S D A ]
P D 6 /[S C K /S C L ]
P D 7 /[S C S ]
P C 4 /[IN T 0 ]/[P IN T ]/T P 2 _ 1
NC
NC
NC
P C 2 /T C K 2 /P C K /C 1 +
P C 3 /P IN T /T P 2 _ 0 /C 1 -
P C 5 /[IN T 1 ]/T P 0 _ 1 /T P 1 B _ 2 /[P C K ]
P D 0 /[T C K 2 ]/[S C S ]
P D 1 /[T P 2 _ 0 ]/[S D O ]/[S C K /S C L ]
P D 2 /[T C K 0 ]/[S D I/S D A ]
P D 3 /[T C K 1 ]/[S D O ]
P D 4 /[T P 2 _ 1 ]
P B 5 /S C S
P A 7 /S C K /S C L
P A 6 /S D I/S D A
P A 5 /C 1 X /S D O
P A 4 /IN T 1 /T C K 1
P A 3 /IN T 0 /C 0 -
P A 2 /T C K 0 /C 0 +
P A 1 /T P 1 A
P A 0 /C 0 X /T P 0 _ 0
P F 1 /[C 1 X ]
P F 0 /[C 0 X ]
44 43 42 41 40 39 38 37 36 35 34
1 33
2 32
3 31
4 30
5
6
7
H T68F50
4 4 Q F P -A
29
28
27
8 26
9 25
10 24
11 23
12 13 14 15 16 17 18 19 20 21 22
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
PE0
PE1
PE2
P E 3 /[T P 3 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
www.DataSheet4U.com
NC
P B 5 /S C S
P A 7 /S C K /S C L
P A 6 /S D I/S D A
P A 5 /C 1 X /S D O
P A 4 /IN T 1 /T C K 1
P A 3 /IN T 0 /C 0 -
P A 2 /T C K 0 /C 0 +
P A 1 /T P 1 A
P A 0 /C 0 X /T P 0 _ 0
NC
P F 1 /[C 1 X ]
48 47 46 45 44 43 42 41 40 39 38 37
1 36
2 35
3 34
4 33
5 32
6
H T68F50
31
7 4 8 Q F N -A 3 0
8 29
9 28
10 27
11 26
12 25
13 14 15 16 17 18 19 20 21 22 23 24
P D 3 /[T C K 1 ]/T P 3 _ 0 /[S D O ]
P D 4 /[T P 2 _ 1 ]
P D 5 /[T P 0 _ 1 ]
PE0
PE1
PE2
P E 3 /[T P 3 _ 1 ]
P C 6 /[T P 0 _ 0 ]/S C O M 2
P C 7 /[T P 1 A ]/S C O M 3
NC
P C 0 /T P 1 B _ 0 /S C O M 0
P C 1 /T P 1 B _ 1 /S C O M 1
Note:
1. Bracketed pin names indicate non-default pinout remapping locations.
2. If the pin-shared pin functions have multiple outputs simultaneously, its pin names at the right side of the
²/² sign can be used for higher priority.
Rev. 1.00
5 November 3, 2009
5 Page 
HT68F20/HT68F30/HT68F40/HT68F50/HT68F60
Pin Name
SCL
SDA
SCOM0~SCOM3
OSC1
OSC2
XT1
XT2
RES
VDD
VSS
Function
I2C Clock
I2C Data
SCOM0~SCOM3
HXT/ERC pin
HXT pin
LXT pin
LXT pin
Reset input
Power supply
Ground
OP
PRM0
PRM0
SCOMC
CO
CO
CO
CO
CO
¾
¾
I/T
ST
ST
¾
HXT
¾
LXT
¾
ST
PWR
PWR
O/T
NMOS
NMOS
SCOM
¾
HXT
¾
LXT
¾
¾
¾
Pin-Shared Mapping
PA7 or PD1 or PD6
PA6 or PD2 or PB7
PC0, PC1, PC6, PC7
PB1
PB2
PB3
PB4
PB0
¾
¾
Note:
I/T: Input type; O/T: Output type
OP: Optional by configuration option (CO) or register option
PWR: Power; CO: Configuration option; ST: Schmitt Trigger input
CMOS: CMOS output; NMOS: NMOS output
SCOM: Software controlled LCD COM; AN: Analog input pin
HXT: High frequency crystal oscillator
LXT: Low frequency crystal oscillator
As the Pin Description Summary table applies to the package type with the most pins, not all of the above listed
pins may be present on package types with smaller numbers of pins.
HT68F60
Pin Name
PA0~PA7
Function
Port A
OP I/T O/T Pin-Shared Mapping
PAWU
PAPU
ST
CMOS ¾
PB0~PB7
Port B
PBPU ST CMOS ¾
PC0~PC7
Port C
PCPU ST CMOS ¾
PD0~PD7
Port D
PDPU ST CMOS ¾
PE0~PE7
www.DataSheet4UP.cFo0m~PF7
Port E
Port F
PEPU ST CMOS ¾
PFPU
ST CMOS ¾
PG0~PG1
Port G
PGPU ST CMOS ¾
C0-, C1-
Comparator 0, 1 input
CP0C
CP1C
AN
¾ PA3, PC3
C0+, C1+
Comparator 0, 1 input
CP0C
CP1C
AN
¾ PA2, PC2
C0X, C1X
Comparator 0, 1 output
CP0C
CP1C
PRM0
¾
CMOS
PA0, PA5 or PF0, PF1 or
PG0, PG1
TCK0~TCK3
TM0~TM3 input
PRM1
ST
PA2, PA4, PC2, PC4 or
¾ PD2, PD3, PD0, -
TP0_0, TP0_1
TM0 I/O
TMPC0
PRM2
ST
CMOS PA0, PC5 or PC6, PD5
TP1A
TM1 I/O
TMPC0
PRM2
ST
CMOS PA1 or PC7
Rev. 1.00
11 November 3, 2009
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT68F60.PDF ] | |
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