|
|
PDF HT82A850R Data sheet ( Hoja de datos )
| Número de pieza | HT82A850R | |
| Descripción | Audio MCU | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de HT82A850R (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
|
No Preview Available !
HT82A850R
Audio MCU
Features
· Operating voltage: fSYS= 6MHz/12MHz: 3.3V~5.5V
· Low voltage reset function (3.0V±0.3V)
· Embedded high performance 16 bit PCM DAC
· Built-in digital Programmable Gain Amplifier - PGA
· High-performance 48kHz/8kHz sampling rate for au-
dio software playback
· 8kHz audio recording sampling rate
· Embedded class AB power amplifier for speaker
driving
· Audio playback digital volume control
· 4096´15 program memory
· 384´8 data memory RAM (Bank0,1)
· Programmable frequency divider - PFD
· Integrated SPI hardware circuit
· Play/record interrupt
· HALT function and wake-up feature reduce power
consumption
· 24 bidirectional I/O lines (max.)
· Two 16-bit programmable timer/event counter and
overflow interrupts
· Watchdog Timer
· 16-level subroutine nesting
· Bit manipulation instruction
· 15-bit table read instruction
· 63 powerful instructions
· All instructions executed within one or two machine
cycles
· 48-pin LQFP package
General Description
The HT82A850R is an 8-bit high performance RISC-like
microcontroller designed for USB Phone product appli-
cations. The HT82A850R integrates a 16-bit PCM ADC
and an 8-bit MCU into a single device. The DAC in the
HT82A850R operates at a sampling rate of 48/8kHz
and the 16-bit PCM ADC operates at a frequency of
8kHz for the Microphone input. The DAC in the
HT82A850R also has a digital programmable gain am-
plifier, whose gain ranges from -32dB to +6dB. For the
ADC input, the digital gain range is from 0dB to 19.5dB.
www.DataSheet4U.com
Rev. 1.10
1 July 25, 2007
1 page  
HT82A850R
Symbol
Parameter
Test Conditions
VDD Conditions
Min. Typ. Max. Unit
DAC+Power Amp
Test condition: Measurement bandwidth 20Hz to 20kHz, fS= 48kHz. Line output series capacitor with 220mF.
THD+N THD+NNote
4W load
5V
8W load
¾ -30 ¾
¾ -35 ¾
dB
SNRDA Signal to Noise RatioNote
4W load
5V
8W load
¾ 81 ¾
dB
¾ 82 ¾
DR Dynamic Range
4W load
5V
8W load
¾ 87 ¾
dB
¾ 88 ¾
POUT
Output Power
4W load, THD=10%
5V
8W load, THD=10%
¾ 400 ¾
mW/ch
¾ 200 ¾
PCM ADC
SNRAD Signal to Noise Ratio
3.3V
¾
¾ 77 ¾ dB
VAG
Reference Voltage
3.3V
¾
¾ 1.12 ¾
V
VPEAK
Peak Single Frequency Tone
Amplitude without Clipping
3.3V
¾
¾ 1.575 ¾
VPK
Note: Sine wave input at 1kHz, -6dB
A.C. Characteristics
Symbol
Parameter
fSYS System Clock (Crystal OSC)
tWDTOSC Watchdog Oscillator Period
tRES RESET Input Pulse Width
tSST System Start-up Timer Period
tINT Interrupt Pulse Width
www.DataSheet4UN.octoem: tSYS=1/fSYS
Test Conditions
VDD Conditions
3.3V
¾
3.3V
¾
¾¾
¾¾
¾¾
Ta=25°C
Min. Typ. Max. Unit
0.4 ¾ 12 MHz
¾ 100 ¾
ms
1 ¾ ¾ ms
¾ 1024 ¾
tSYS
1 ¾ ¾ ms
Rev. 1.10
5 July 25, 2007
5 Page 
HT82A850R
During the execution of an interrupt subroutine, other in-
terrupt acknowledge signals are held until the ²RETI² in-
struction is executed or the EMI bit and the related
interrupt control bit are set to 1 (if the stack is not full). To
return from the interrupt subroutine, a ²RET² or ²RETI²
instruction should be executed. A RETI instruction will
set the EMI bit to enable an interrupt service, but a RET
instruction will not.
Interrupts, occurring in the interval between the rising
edges of two consecutive T2 pulses, will be serviced on
the latter of the two T2 pulses, if the corresponding inter-
rupts are enabled. In the case of simultaneous requests
the following table shows the priority that is applied.
These can be masked by resetting the EMI bit.
Interrupt Source
Priority Vector
Reserved
1 04H
Timer/Event Counter 0 overflow
2
08H
Timer/Event Counter 1 overflow
3
0CH
Play Interrupt
4 10H
Serial Interface Interrupt
5 14H
Record Interrupt
6 18H
It is recommended that a program does not use the
²CALL subroutine² within the interrupt subroutine. Inter-
rupts often occur in an unpredictable manner or need to
be serviced immediately in some applications. If only one
stack is left and enabling the interrupt is not well con-
trolled, the original control sequence will be damaged
once the ²CALL² operates in the interrupt subroutine.
Oscillator Configuration
O SCI
www.DataSheet4U.com
O SCO
C r y s ta l O s c illa to r
System Oscillator
An internal oscillator circuit is integrated within the
microcontroller to implement the system clock. When
the device enters the Power-down mode the system os-
cillator will stop running and external signals will be
ignored to conserve power.
A crystal across OSCI and OSCO is required to provide
the feedback and phase shift required for the oscillator.
No other external components are required. Instead of a
crystal, a resonator can also be connected between
OSCI and OSCO to obtain the correct frequency refer-
ence, however two external capacitors between the
OSCI, OSCO pins and ground are required.
A WDT oscillator is also contained within the device.
This is a free running fully integrated RC oscillator
requiring no external components. Even if the system
enters the power down mode, where the system clock is
stopped, the WDT oscillator continues to run. The WDT
oscillator can be disabled by a configuration option to
conserve power.
Watchdog Timer - WDT
The WDT clock source is implemented by its own dedi-
cated internal RC oscillator (WDT oscillator) or by using
the instruction clock, which is the system clock/4. The
WDT timer is designed to prevent a software malfunc-
tion or sequence from jumping to an unknown location
with unpredictable results. The WDT can be disabled
using a configuration option. Note that if the WDT is dis-
abled, all executions of instructions related to the WDT
will result in no operation.
When the WDT clock source is selected, it will be first di-
vided by 256 (8-stage) to obtain a nominal time-out pe-
riod. By using this WDT prescaler, longer time-out
periods can be implemented. This is achieved by writing
data to the the WS2, WS1, WS0 bits.
The WDT OSC period has a typical value of 65ms. This
time-out period may vary with temperature, VDD and
process variations. The WDT OSC keeps running in any
operational mode.
If the instruction clock is selected as the WDT clock
source, the WDT operates in the same manner except
when the device is in the Power-down mode. Here the
WDT stops counting and loses its protecting function. In
this situation the device can only be re-started by exter-
nal logic. The high nibble and bit3 of the WDTS are re-
served for user defined flags, which can be used to
indicate some specified status.
The WDT overflow under normal operation initialises a
²chip reset² and sets the status bit ²TO². In the
Power-down mode, the overflow initialises a ²warm re-
set², where only the PC and SP are reset to zero. To
clear the contents of the WDT, there are three methods
that can be used, i.e., external reset (a low level on the
RESET pin), a software instruction, and a ²HALT² in-
struction. There are two types of software instructions;
²CLR WDT² and the other set ²CLR WDT1² and ²CLR
WDT2². Of these two types of instruction, only one type
of instruction can be active at a time depending on the
options ²CLR WDT² times selection option. If the ²CLR
WDT² is selected (i.e., CLR WDT times equal one), any
execution of the ²CLR WDT² instruction clears the WDT.
In the case that ²CLR WDT1² and ²CLR WDT2² are
chosen (i.e., CLR WDT times equal two), these two in-
structions have to be executed to clear the WDT; other-
wise, the WDT may reset the chip due to time-out.
Rev. 1.10
11 July 25, 2007
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet HT82A850R.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| HT82A850R | Audio MCU | Holtek Semiconductor |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |