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PDF MAX5073 Data sheet ( Hoja de datos )
| Número de pieza | MAX5073 | |
| Descripción | Dual-Output Buck or Boost Converter | |
| Fabricantes | Maxim Integrated Products | |
| Logotipo |  |
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19-3504; Rev 2; 2/06
www.DataSheet4EUV.AcAoLVmUAAILTAIOBNLEKIT
2.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
General Description
The MAX5073 is a dual-output DC-DC converter with inte-
grated high-side n-channel power MOSFETs. Each output
can be configured either as a buck converter or a boost
converter. The device is capable of operating from a wide
5.5V to 23V input voltage range. Each output is program-
mable down to 0.8V in the buck mode and up to 28V in
the boost mode with an output voltage accuracy of ±1%.
In the buck mode, converter 1 and converter 2 can deliv-
er 2A and 1A, respectively. The output switching frequen-
cy of each converter can be programmed from 200kHz to
2.2MHz to avoid harmonics in a radio power supply or to
reduce the size of the power supply. Each output oper-
ates 180° out-of-phase thus reducing input-capacitor rip-
ple current, size, and cost. A SYNC input facilitates
external frequency synchronization. Moreover, a CLKOUT
output provides out-of-phase clock signal with respect to
converter 2, allowing four-phase operation using two
MAX5073 ICs in master-slave configuration.
The MAX5073 includes an internal digital soft-start that
reduces inrush current, eliminates output-voltage over-
shoot, and ensures monotonic rise in output voltage
during power-up. The device includes individual shut-
down and a power-good output for each converter.
Protection features include output short-circuit protec-
tion for buck mode and maximum duty-cycle limit for
boost operation, as well as thermal shutdown.
The MAX5073 is available in a thermally enhanced 28-
pin thin QFN package that can dissipate 2.7W at +70°C
ambient temperature. The device is rated for operation
over the -40°C to +85°C extended, or -40°C to +125°C
automotive temperature range.
Applications
Automotive Radio Power Supply
Point-of-Load DC-DC Converters
Telecom Line Card
Networking Line Card
Power-Over-Ethernet Postregulation for PDs
Features
♦ 4.5V to 5.5V or 5.5V to 23V Input Supply
Voltage Range
♦ 0.8V (Buck) to 28V (Boost) Output Voltage
♦ Two Independent Output DC-DC Converters
with Internal Power MOSFETs
♦ Each Output can be Configured in Buck or Boost
Mode
♦ IOUT1 and IOUT2 of 2A and 1A (Respectively) in
Buck Mode
♦ 180° Out-of-Phase Operation
♦ Clock Output for Four Phase Operation
♦ Switching Frequency Programmable from 200kHz
to 2.2MHz
♦ Digital Soft-Start and Sync Input
♦ Individual Converter Shutdown and Power-Good
Output
♦ Short-Circuit Protection (Buck)/Maximum Duty-
Cycle Limit (Boost)
♦ Thermal Shutdown
♦ Thermally Enhanced 28-Pin Thin QFN Package
Dissipates up to 2.7W at +70°C
Pin Configuration
TOP VIEW
21 20 19 18 17 16 15
PGOOD2 22
SOURCE1 23
SOURCE1 24
14 BYPASS
13 VL
12 VL
PART
Ordering Information
TEMP RANGE PIN-PACKAGE
PKG
CODE
SGND 25
PGND 26
SOURCE2 27
MAX5073
11 V+
10 OSC
9 N.C.
MAX5073ETI
-40°C to +85°C
28 Thin QFN-EP*
(5mm x 5mm)
T2855-6
MAX5073ETI+ -40°C to +85°C
28 Thin QFN-EP*
(5mm x 5mm)
T2855-6
*EP = Exposed pad.
+Denotes lead-free package.
Ordering Information continued at end of data sheet.
SOURCE2 28
8 SYNC
1234567
THIN QFN
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
2.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
(V+ = VL = 5.2V, TA = +25°C, unless otherwise noted.)
Typical Operating Characteristics
OUTPUT1 EFFICIENCY (BUCK CONVERTER)
vs. LOAD CURRENT
100
90 VIN = 5V
80
70
60 VIN = 12.0V
50 VIN = 16.0V
40
30
20 VOUT = 3.3V
10 fSW = 2.2MHz
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
LOAD (A)
OUTPUT1 VOLTAGE (BUCK CONVERTER)
vs. LOAD CURRENT
3.40
OUTPUT2 EFFICIENCY (BUCK CONVERTER)
vs. LOAD CURRENT
100
90
VIN = 5V
80
70
60
50 VIN = 12.0V
40 VIN = 16.0V
30
20
VOUT = 2.5V
10 fSW = 2.2MHz
0
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
LOAD (A)
OUTPUT2 VOLTAGE (BUCK CONVERTER)
vs. LOAD CURRENT
2.60
3.35
2.55
3.30
2.50
3.25
3.20
0
0.5 1.0 1.5
LOAD (A)
2.0
VL DROPOUT VOLTAGE vs. EACH CONVERTER
SWITCHING FREQUENCY
0.35
VIN = 5.5V
0.30
0.25
0.20
VIN = 5V
0.15
0.10 VIN = 4.5V
0.05
0
0 0.5 1.0 1.5 2.0 2.5
SWITCHING FREQUENCY (fSW) (MHz)
2.45
0
0.25 0.50 0.75
LOAD (A)
1.00
EACH CONVERTER SWITCHING FREQUENCY
vs. ROSC
10
1
0.1
0
20 40 60
ROSC (kΩ)
80
OUTPUT2 EFFICIENCY (BOOST CONVERTER)
vs. LOAD CURRENT
100
90 VIN = 5V
80
70
60 VIN = 3.3V
50
40
30
20
10
0
0.02
VOUT = 12V
fSW = 2.2MHz
0.08 0.14
LOAD (A)
0.20
VL OUTPUT VOLTAGE
vs. CONVERTER SWITCHING FREQUENCY
5.50
BOTH CONVERTERS SWITCHING
5.45
5.40
5.35
5.30 VIN = 23V
5.25
5.20
5.15
5.10 VIN = 5.5V
5.05
5.00
0.1
0.6 1.1 1.6 2.1
SWITCHING FREQUENCY (fSW) (MHz)
2.6
EACH CONVERTER SWITCHING FREQUENCY
vs. TEMPERATURE
10
2.2MHz
1.25MHz
1
0.6MHz
0.3MHz
0.1
-50
0 50 100
TEMPERATURE (°C)
150
_______________________________________________________________________________________ 5
5 Page 
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2.2MHz, Dual-Output Buck or Boost Converter
with Internal Power MOSFETs
Internal Oscillator/Out-of-Phase Operation
The internal oscillator generates the 180° out-of-phase
clock signal required by each regulator. The internal
oscillator frequency is programmable from 400kHz to
4.4MHz using a single 1% resistor at ROSC. Use the fol-
lowing equation to calculate ROSC:
ROSC
=
25 × 109
fOSC
where fOSC is the internal oscillator frequency in hertz
and ROSC in ohms.
The two independent regulators in the MAX5073 switch
180° out-of-phase to reduce input filtering require-
ments, to reduce electromagnetic interference (EMI),
and to improve efficiency. This effectively lowers com-
ponent cost and saves board space, making the
MAX5073 ideal for cost-sensitive applications.
With dual synchronized out-of-phase operation, the
MAX5073’s high-side MOSFETs turn on 180° out-of-
phase. The instantaneous input current peaks of both
regulators do not overlap, resulting in reduced RMS rip-
ple current and input voltage ripple. This reduces the
required input capacitor ripple current rating, allows for
fewer or less expensive capacitors, and reduces
shielding requirements for EMI. The out-of-phase wave-
forms in the Typical Operating Characteristics demon-
strate synchronized 180° out-of-phase operation.
Synchronization (SYNC)/
Clock Output (CLKOUT)
The main oscillator can be synchronized to the system
clock by applying an external clock (fSYNC) at SYNC.
The fSYNC frequency must be twice the required oper-
ating frequency of an individual converter. Use a TTL
logic signal for the external clock with at least a 100ns
pulse width. ROSC is still required when using external
synchronization. Program the internal oscillator fre-
quency so 0.2fSYNC < fOSC < 1.2fSYNC. The rising
edge of fSYNC synchronizes the turn-on edge of the
internal MOSFET (see Figure 3).
ROSC
=
25 × 109
fOSC
where fOSC is the internal oscillator frequency in hertz
and ROSC in ohms, fOSC = 2 x fSW.
Two MAX5073s can be connected in the master-slave
configuration for four ripple-phase operation. The
MAX5073 provides a clock output (CLKOUT) that is 45°
phase-shifted with respect to the internal switch turn-on
edge. Feed the CLKOUT of the master to the SYNC
input of the slave. The effective input ripple switching
frequency shall be four times the individual converter’s
switching frequency. When driving the master convert-
er using external clock at SYNC, set the clock duty
cycle to 50% for a 90° phase-shifted operation.
Input Voltage (V+)/Internal Linear
Regulator (VL)
All internal control circuitry operates from an internally
regulated nominal voltage of 5.2V (VL). At higher input
voltages (V+) of 5.5V to 23V, VL is regulated to 5.2V.
At 5.5V or below, the internal linear regulator operates
in dropout mode, where VL follows V+. Depending on
the load on VL, the dropout voltage can be high
enough to reduce VL below the undervoltage lockout
(UVLO) threshold.
For input voltages of less than 5.5V, connect V+ and VL
together. The load on VL is proportional to the switch-
ing frequency of converter 1 and converter 2. See the
Dropout Voltage vs. Switching Frequency graph in the
Typical Operating Characteristics. For input voltage
ranges higher than 5.5V, use the internal regulator.
Bypass V+ to SGND with a low-ESR, 0.1µF or greater
ceramic capacitor placed close to the MAX5073. Current
spikes from VL may disturb internal circuitry powered by
VL. Bypass VL with a low-ESR, ceramic 0.1µF capacitor
to PGND and 4.7µF capacitor to SGND.
Undervoltage Lockout/Soft-Start
The MAX5073 includes an undervoltage lockout with
hysteresis and a power-on-reset circuit for converter
turn-on and monotonic rise of the output voltage. The
rising UVLO threshold is internally set to 4.3V with a
175mV hysteresis. Hysteresis at UVLO eliminates “chat-
tering” during startup. When VL drops below UVLO, the
internal switches are turned off.
Digital soft-start is provided internally to reduce input
surge currents and glitches at the input during turn-on.
When UVLO is cleared and EN_ is high, digital soft-
start slowly ramps up the internal reference voltage in
64 steps. The total soft-start period is 2048 switching
cycles of the internal oscillator.
To calculate the soft-start period, use the following
equation:
tSS
=
2048
fOSC
where fOSC is the internal oscillator frequency in hertz,
which is twice the switching frequency of each converter.
______________________________________________________________________________________ 11
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| Páginas | Total 25 Páginas | |
| PDF Descargar | [ Datasheet MAX5073.PDF ] | |
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