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PDF HT24LC64 Data sheet ( Hoja de datos )
| Número de pieza | HT24LC64 | |
| Descripción | CMOS 64K 2-WIRE SERIAL EEPROM | |
| Fabricantes | Holtek Semiconductor | |
| Logotipo |  |
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HT24LC64
www.DataSheet4U.cAombsolute Maximum Ratings
Operating Temperature (Commercial) ........................................................................................................ 0°C to 70°C
Storage Temperature ............................................................................................................................ -50°C to 125°C
Applied VCC Voltage with Respect to VSS .................................................................................VSS -0.3V to VSS+6.0V
Applied Voltage on any Pin with Respect to VSS ................................................................................................VSS -0.3V to VCC+0.3V
Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may
cause substantial damage to the device. Functional operation of this device at other conditions beyond those
listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliabil-
ity.
D.C. Characteristics
Symbol
Parameter
VCC Operating Voltage
Test Conditions
VCC Conditions
¾¾
Min.
2.4
ICC1 Operating Current
5V Read at 100kHz
¾
ICC2 Operating Current
5V Write at 100kHz
¾
VIL Input Low Voltage
¾¾
-1
VIH
VOL
ILI
ILO
ISTB1
ISTB2
CIN
Input High Voltage
Output Low Voltage
Input Leakage Current
Output Leakage Current
Standby Current
Standby Current
Input Capacitance (See Note)
¾¾
2.4V IOL=2.1mA
5V VIN=0 or VCC
5V VOUT=0 or VCC
5V VIN=0 or VCC
2.4V VIN=0 or VCC
¾ f=1MHz 25°C
0.7VCC
¾
¾
¾
¾
¾
¾
COUT Output Capacitance (See Note) ¾ f=1MHz 25°C
¾
Note: These parameters are periodically sampled but not 100% tested.
Ta=0°C to 70°C
Typ.
Max.
Unit
¾ 5.5 V
¾ 2 mA
¾ 5 mA
¾ 0.3VCC V
¾ VCC+0.5 V
¾ 0.4 V
¾ 1 mA
¾ 1 mA
¾ 5 mA
¾ 4 mA
¾ 6 pF
¾ 8 pF
A.C. Characteristics
Ta=0°C to 70°C
Symbol
Parameter
Remark
Standard Mode* VCC=5V±10%
Min. Max. Min. Max.
fSK Clock Frequency
¾ ¾ 100 ¾ 400
tHIGH Clock High Time
¾ 4000 ¾ 600 ¾
tLOW Clock Low Time
¾ 4700 ¾ 1200 ¾
tR SDA and SCL Rise Time Note
¾ 1000 ¾
300
tF SDA and SCL Fall Time
Note
¾ 300 ¾ 300
tHD:STA START Condition Hold Time
After this period, the first
clock pulse is generated.
4000
¾
600
¾
tSU:STA
START Condition Setup Time
Only relevant for repeated
START condition.
4000
¾
600
¾
tHD:DAT Data Input Hold Time
¾ 0¾0¾
tSU:DAT Data Input Setup Time
¾ 200 ¾ 100 ¾
tSU:STO STOP Condition Setup Time
¾ 4000 ¾ 600 ¾
tAA Output Valid from Clock
¾
¾ 3500 ¾
900
Unit
kHz
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Rev. 1.00
2 January 5, 2005
1 page  
www.DataSheet4U.cToimming Diagrams
SCL
t S U :S T A
S D A tS P
SDA
OUT
tF
tL O W
t R t H IG H
t H D :S T A
t H D :D A T
tA A
V a lid
t S U :D A T
HT24LC64
V a lid
t S U :S T O
tB U F
SCL
S D A 8 th b it A C K
W o rd n
tW R
S to p
c o n d itio n
S to p
c o n d itio n
Note: The write cycle time tWR is the time from a valid stop condition of a write sequence to the end of the valid start con-
dition of sequential command.
Rev. 1.00
6 January 5, 2005
5 Page | ||
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