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PDF ISL6336A Data sheet ( Hoja de datos )

Número de pieza ISL6336A
Descripción 6-Phase PWM Controller
Fabricantes Intersil Corporation 
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ISL6336, ISL6336A
®
www.DataSheet4U.com
Data Sheet
March 3, 2008
FN6504.0
6-Phase PWM Controller with Light Load
Efficiency Enhancement and Current
Monitoring
The ISL6336, ISL6336A controls microprocessor core voltage
regulation by driving up to 6 interleaved synchronous-rectified
buck channels in parallel. Multiphase buck converter
architecture uses interleaved timing to multiply channel ripple
frequency and reduce input and output ripple currents. Lower
ripple results in fewer components, lower component cost,
reduced power dissipation, and smaller implementation area.
Microprocessor loads can generate load transients with
extremely fast edge rates and require high efficiency over
the full load range. The ISL6336, ISL6336A utilizes Intersil’s
proprietary Active Pulse Positioning (APP) and Adaptive
Phase Alignment (APA) modulation scheme and a
proprietary active phase dropping/adding and diode
emulation scheme to achieve extremely fast transient
response with fewer output capacitors and high efficiency
from light load to full load.
The ISL6336, ISL6336A is compliant with Intel’s VR11.1
specification. Features include a pin (IMON) for current
monitoring and a Power State Indicator (PSI#) input pin to
initiate a proprietary phase dropping and diode emulation
scheme for higher efficiency at light load by dropping to 1- or
2-phase operation with optional diode emulation (ISL6336)
to reduce switching and core losses in the converter. After
the PSI# signal is de-asserted, the dropped phase(s) are
added back to sustain heavy load transient and efficiency.
Today’s microprocessors require a tightly regulated output
voltage position versus load current (droop). The ISL6336,
ISL6336A senses the output current continuously by utilizing
patented techniques to measure the voltage across a
dedicated current sense resistor or the DCR of the output
inductor. Current sensing provides the needed signals for
precision droop, channel-current balancing, and overcurrent
protection. A programmable integrated temperature
compensation function is implemented to effectively
compensate the temperature variation of the current sense
element. A current limit function provides overcurrent
protection for the individual phase.
A unity gain, differential amplifier is provided for remote voltage
sensing and eliminates any potential difference between
remote and local grounds. This improves regulation and
protection accuracy. The threshold-sensitive enable input is
available to accurately coordinate the start up of the ISL6336,
ISL6336A with any other voltage rail. Dynamic-VID™
technology allows seamless on-the-fly VID changes. The offset
pin allows accurate voltage offset settings that are independent
of VID setting.
Features
• Intel VR11.1 Compliant
• Proprietary Active Pulse Positioning and Pin Adaptive
Phase Alignment Modulation Scheme
• Proprietary Active Phase Adding and Dropping with Diode
Emulation for High Efficiency at Light Load
• Precision Multiphase Core Voltage Regulation
- Differential Remote Voltage Sensing
- ±0.5% System Accuracy Over Life, Load, Line and
Temperature
- Bi-directional Adjustable Reference-Voltage Offset
• Precision Resistor or DCR Current Sensing
- Accurate Load-Line Programming
- Accurate Channel-Current Balancing
- Accurate Current Monitoring Output Pin (IMON)
• Microprocessor Voltage Identification Input
- Dynamic VID™ Technology
- 8-Bit VID Input With VR11 Code
• Thermal Monitor and OV Protection with OVP Output
• Average Overcurrent Protection and Channel Current Limit
• Precision Overcurrent Protection on IMON pin
• Integrated Open Sense Line Protection
• Integrated Programmable Temperature Compensation
• 1- to 6-Phase Operation; Coupled Inductor Compatible
• Adjustable Switching Frequency up to 1MHz Per Phase
• Package Option
- QFN Compliant to JEDEC PUB95 MO-220 QFN - Quad
Flat No Leads - Product Outline
• Pb-Free (RoHS Compliant)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2008. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.

1 page




ISL6336A pdf
ISL6336, ISL6336A
Typical Application - 5-Phase Buck Converter with DCR Sensing and Integrated TCOMP
www.DataSheet4U.com
+5V
+5V
ISL6620
VCC BOOT
UGATE
EN PHASE
PWM LGATE
GND
VIN
FB COMP APA REF
VDIFF
DAC
VSEN
RGND
VTT EN_VTT
VCC
GND
VR_RDY
VID7
VID6
VID5
VID4
VID3
VID2
VID1
VID0
PSI#
OVP
ISL6336
PWM1
ISEN1-
ISEN1+
PWM4
ISEN4-
ISEN4+
PWM2
ISEN2-
ISEN2+
IMON
PWM5
ISEN5-
ISEN5+
PWM3
ISEN3-
VR_FAN
VR_HOT
ISEN3+
PWM6
ISEN6-
ISEN6+
TM EN_PWR
+5V TCOMP OFS FS SS
+5V
ROFS RT
R SS
VIN
+5V
NTC
+5V
ISL6596
VCC BOOT
UGATE
EN PHASE
PWM LGATE
GND
+5V
ISL6596
VCC BOOT
UGATE
EN PHASE
PWM LGATE
GND
+5V
ISL6596
VCC BOOT
UGATE
EN PHASE
PWM LGATE
GND
+5V
ISL6596
VCC BOOT
UGATE
EN PHASE
PWM LGATE
GND
VIN
VIN
VIN
VIN
µP
LOAD
5 FN6504.0
March 3, 2008

5 Page





ISL6336A arduino
ISL6336, ISL6336A
OFS - The OFS pin provides a means to program a DC
offset current for generating a DC offset voltage at the REF
inpwuwt.wT.DhaetaoSffhseeettc4uUr.rceonmt is generated via an external resistor
and precision internal voltage references. The polarity of the
offset is selected by connecting the resistor to GND or VCC.
For no offset, the OFS pin should be left unterminated.
TCOMP - Temperature compensation scaling input. The
voltage sensed on the TM pin is utilized as the temperature
input to adjust IDROOP and the overcurrent protection limit to
effectively compensate for the temperature coefficient of the
current sense element. To implement the integrated
temperature compensation, a resistor divider circuit is needed
with one resistor being connected from TCOMP to VCC of the
controller and another resistor being connected from TCOMP
to GND. Changing the ratio of the resistor values will set the
gain of the integrated thermal compensation. When integrated
temperature compensation function is not used, connect
TCOMP to GND.
OVP - The overvoltage protection output indication pin. This
pin can be pulled to VCC and is latched when an overvoltage
condition is detected. When the OVP indication is not used,
keep this pin open.
IMON - IMON is a current output of the average of the sum
of each phase’s sensed current. A resistor connected from
IMON to GND will produce a voltage that is proportional to
the regulator current. The voltage at this pin is internally
clamped to 1.12V. If the voltage reaches 1.12V the clamp is
activated an overcurrent shutdown will be initiated.
Place a resistor from this pin to GND. A capacitor in parallel
with this resistor is required. The capacitor should be sized
for a minimum time constant of 300µs.
TM - TM is an input pin for VR temperature measurement.
Connect this pin through NTC thermistor to GND and a resistor
to VCC of the controller. The voltage at this pin is reverse
proportional to the VR temperature. ISL6336, ISL6336A
monitors the VR temperature based on the voltage at the TM
pin and the output signals at VR_HOT and VR_FAN.
VR_HOT - VR_HOT is used as an indication of high VR
temperature. It is an open-drain logic output. It will be open
when the measured VR temperature reaches a certain level.
VR_FAN - VR_FAN is an output pin with open-drain logic
output. It will be open when the measured VR temperature
reaches a certain level.
PSI# - The PSI# pin is used to change the state of the
controller. When PSI# is asserted the controller will change
the operating state to improve light load efficiency. The
controller drops the number of active phases to 1-phase or
2-phase operation with diode emulation according to the logic
shown in Table 1. The FS and SS pins are used to optimize
light load efficiency for non-coupled inductor, 2-phase coupled
inductor, and (n-x)-phase coupled inductor applications. The
controller resumes normal operation when this pin is pulled
HIGH. This pin has a 40µA internal pull-up to about 1V.
APA - The APA pin is used to adjust the Adaptive Phase
Alignment trip level. A 50µA current source flows into this pin.
A resistor connected from this pin to COMP sets the voltage
trip level. A small decoupling capacitor should be placed in
parallel with the resistor for high frequency decoupling.
Operation
Multiphase Power Conversion
Microprocessor load current profiles have changed to the
point that the advantages of multiphase power conversion
are impossible to ignore. The technical challenges
associated with producing a single-phase converter which is
both cost-effective and thermally viable, have forced a
change to the cost-saving approach of multiphase. The
ISL6336, ISL6336A controller helps reduce the complexity of
implementation by integrating vital functions and requiring
minimal output components. The block diagrams on page 5
and 6 provide top level views of multiphase power
conversion using the ISL6336, ISL6336A controller.
Interleaving
The switching of each channel in a multiphase converter is
timed to be symmetrically out of phase with each of the other
channels. In a 3-phase converter for example, each channel
switches 1/3 cycle after the previous channel and 1/3 cycle
before the following channel. As a result, the three-phase
converter has a combined ripple frequency three times
greater than the ripple frequency of any one phase. In
addition, the peak-to-peak amplitude of the combined
inductor current is reduced in proportion to the number of
phases (see Equations 1 and 2). The increased ripple
frequency and the lower ripple amplitude mean that the
designer can use less per-channel inductance and lower
total output capacitance for any performance specification.
Figure 1 illustrates the multiplicative effect on output ripple
frequency. The three channel currents (IL1, IL2, and IL3)
combine to form the AC ripple current and the DC load
current. The ripple component has three times the ripple
frequency of each individual channel current. Each PWM
pulse is triggered 1/3 of a cycle after the start of the PWM
pulse of the previous phase. The DC components of the
inductor currents combine to feed the load.
To understand the reduction of the ripple current amplitude in
the multiphase circuit, examine Equation 1, which represents
an individual channel’s peak-to-peak inductor current.
IPP =
(---V----I--N----------V----O----U-----T---)--------V----O----U-----T-
L
fS
V
IN
(EQ. 1)
In Equation 1, VIN and VOUT are the input and the output
voltages respectively, L is the single-channel inductor value,
and fS is the switching frequency.
11 FN6504.0
March 3, 2008

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