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PDF SH7616 Data sheet ( Hoja de datos )
| Número de pieza | SH7616 | |
| Descripción | 32-Bit RISC Microcomputer | |
| Fabricantes | Renesas Technology | |
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REJ09B0292-0200
The revision list can be viewed directly by
clicking the title page.
The revision list summarizes the locations of
revisions and additions. Details should always
be checked by referring to the relevant text.
32
www.DataSheet4U.com
SH7616
Hardware Manual
Renesas 32-Bit RISC Microcomputer
SuperH™ RISC engine Family/SH7600 Series
SH7616 HD6417616
Rev. 2.00
Revision Date: Mar 09, 2006
1 page  
Main Revisions in This Edition
Item
Page Revision (See Manual for Details)
All • Company name amended
Hitachi, Ltd. → Renesas Technology Corp.
2.1.4 DSP Registers 37
• Amendments made due to change in package code
FP-208C → PRQP0208KA-A
Description added
Figure 2.4 shows the DSP registers. The DSR register bit functions
are shown in table 2.2. Registers A0, X0, X1, Y0, Y1, and DSR are
handled as system registers by CPU core instructions.
7.1.5 Address Map 255 Table amended
Table 7.3 Address
Map
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7.2.7 Individual
Memory Control
Register (MCR)
Address
H'1000E000–H'1000EFFF
H'1001E000–H'1001EFFF
Space
On-chip X RAM area
On-chip Y RAM area
269 to Description replaced
274
Memory
Size
4 kbytes
4 kbytes
Bits 1 and 15
• For synchronous
DRAM interface
Bits 7, 5, and 4
7.5.11 64 Mbit
Synchronous DRAM
(2 Mword × 32-bit)
Connection
323
Description amended
Synchronous DRAM Mode Settings: To make mode settings for
the synchronous DRAM, write to address X+H'FFFF0000 or
X+H'FFFF8000 from the CPU. (X represents the setting value.)
Whether to use X+H'FFFF0000 or X+H'FFFF8000 determines on
the synchronous DRAM used.
8.4.7 Associative 369 Figure amended
Purges
Associative purge:
Figure 8.11
Associative Purge
Access
Bit 31 29 28
Address
010
Number of bits 3
Tag address
19
10 9
43 0
Entry
address
—
64
Rev. 2.00 Mar 09, 2006 page v of xxvi
5 Page 
Contents
Section 1 Overview .............................................................................................................
1.1 Features of SuperH Microcomputer with On-Chip Ethernet Controller ...........................
1.2 Block Diagram ..................................................................................................................
1.3 Pin Description..................................................................................................................
1.3.1 Pin Arrangement ..................................................................................................
1.3.2 Pin Functions .......................................................................................................
1.3.3 Pin Multiplexing ..................................................................................................
1.4 Processing States...............................................................................................................
1
1
13
14
14
15
21
27
Section 2 CPU ...................................................................................................................... 31
2.1 Register Configuration ...................................................................................................... 31
2.1.1 General Registers ................................................................................................. 31
www.DataSheet42U.1.c.2om Control Registers ................................................................................................. 33
2.1.3 System Registers .................................................................................................. 36
2.1.4 DSP Registers ...................................................................................................... 37
2.1.5 Notes on Guard Bits and Overflow Treatment..................................................... 40
2.1.6 Initial Values of Registers.................................................................................... 40
2.2 Data Formats ..................................................................................................................... 41
2.2.1 Data Format in Registers...................................................................................... 41
2.2.2 Data Formats in Memory ..................................................................................... 41
2.2.3 Immediate Data Format ....................................................................................... 42
2.2.4 DSP Type Data Formats ...................................................................................... 42
2.2.5 DSP Type Instructions and Data Formats ............................................................ 44
2.3 CPU Core Instruction Features ......................................................................................... 48
2.4 Instruction Formats ........................................................................................................... 52
2.4.1 CPU Instruction Addressing Modes..................................................................... 52
2.4.2 DSP Data Addressing........................................................................................... 56
2.4.3 Instruction Formats for CPU Instructions ............................................................ 62
2.4.4 Instruction Formats for DSP Instructions............................................................. 66
2.5 Instruction Set ................................................................................................................... 72
2.5.1 CPU Instruction Set ............................................................................................. 73
2.5.2 DSP Data Transfer Instruction Set ....................................................................... 89
2.5.3 DSP Operation Instruction Set ............................................................................. 93
2.5.4 Various Operation Instructions ............................................................................ 96
2.6 Usage Notes ...................................................................................................................... 105
2.6.1 When not using DSP instructions ........................................................................ 105
Rev. 2.00 Mar 09, 2006 page xi of xxvi
11 Page | ||
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| PDF Descargar | [ Datasheet SH7616.PDF ] | |
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