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PDF ADN8831 Data sheet ( Hoja de datos )
| Número de pieza | ADN8831 | |
| Descripción | Thermoelectric Cooler (TEC) Controller | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Thermoelectric Cooler (TEC) Controller
ADN8831
FEATURES
GENERAL DESCRIPTION
Two integrated zero drift, rail-to-rail, chop amplifiers
TEC voltage and current operation monitoring
Programmable TEC maximum voltage and current
Programmable TEC current heating and cooling limits
Configurable PWM switching frequency up to 1 MHz
Power efficiency: > 90%
Temperature lock indication
Optional internal or external clock source
Clock phase adjustment for multiple drop operation
Supports negative temperature coefficient (NTC) thermistors
or positive temperature coefficient (PTC) resistance
thermal detectors (RTDs)
5 V typical and optional 3 V supplies
Standby and shutdown mode availability
Adjustable soft start feature
5 mm × 5 mm 32-lead LFCSP
APPLICATIONS
Thermoelectric cooler (TEC) temperature control
DWDM optical transceiver modules
Optical fiber amplifiers
Optical networking systems
Instruments requiring TEC temperature control
The ADN8831 is a monolithic TEC controller. It has two inte-
grated, zero drift, rail-to-rail comparators, and a PWM driver.
A unique PWM driver works with an analog driver to control
external selected MOSFETs in an H-bridge. By sensing the
thermal detector feedback from the TEC, the ADN8831 can
drive a TEC to settle the programmable temperature of a laser
diode or a passive component attached to the TEC module.
The ADN8831 supports NTC thermistors or positive tempera-
ture coefficient (PTC) RTDs. The target temperature is set as an
analog voltage input either from a DAC or from an external
resistor divider driven by a reference voltage source.
A proportional integral differential (PID) compensation
network helps to quickly and accurately stabilize the ADN8831
thermal control loop. An adjustable PID compensation network
example is described in the AN-695 Application Note, Using the
ADN8831 TEC Controller Evaluation Board. A typical reference
voltage of 2.5 V is available from the ADN8831 for thermistor
temperature sensing or for TEC voltage/current measuring and
limiting in both cooling and heating modes.
FUNCTIONAL BLOCK DIAGRAM
ILIMC ILIMH ITEC VLIM VTEC CS
IN1P
IN1N
AMPLIFIER
Chop1
OUT1
IN2P
IN2N
AMPLIFIER
Chop2
OUT2
LIMITER/MONITOR
CONTROL
REF
SOFT START
SHUTDOWN
LINEAR
MOSFET
DRIVER
PWM
MOSFET
DRIVER
OSCILLATOR
LFB
LPGATE
LNGATE
SFB
SPGATE
SNGATE
COMPSW
SW
COMPOSC
SYNCO
TMPGD VREF
SS/SB
Figure 1.
SYNCI/SD PHASE FREQ
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2005–2012 Analog Devices, Inc. All rights reserved.
1 page  
ADN8831
Data Sheet
SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
VDD = 3.0 V to 5.0 V, TA = 25°C, unless otherwise noted.
Table 1.
Parameter1
Symbol
PWM OUTPUT DRIVER
Output Transition Time
Nonoverlapping Clock Delay
tR, tF
Output Resistance
Output Voltage Swing2
RO (SNGATE, SPGATE)
SFB
LINEAR OUTPUT AMPLIFIER
Output Resistance
Output Voltage Swing2
RO, LNGATE
RO, LPGATE
LFB
POWER SUPPLY
Power Supply Voltage
Supply Current
VDD
ISY
Shutdown Current
Soft Start Charging Current
Undervoltage Lockout3
Standby Current
Standby Threshold
ERROR/COMPENSATION AMPLIFIERS
Input Offset Voltage
Input Voltage Range
Common-Mode Rejection Ratio
Output Voltage High
Output Voltage Low
Power Supply Rejection Ratio
Output Current
Gain Bandwidth Product
OSCILLATOR
Sync Range
ISD
ISS
UVLO
ISB
VSB
VOS1
VOS2
VCM1, VCM2
CMRR1, CMRR2
VOH1, VOH2
VOL1, VOL2
PSRR1, PSRR2
IOUT1, IOUT2
GBW1, GBW2
fCLK
Oscillator Frequency
fCLK
Nominal Free-Run Oscillation
Frequency
Phase Adjustment Range2
fCLK-NOMINAL
ΦCLK
Phase Adjustment Default
REFERENCE VOLTAGE
Reference Voltage
ΦCLK
VREF
Test Conditions/Comments
CL = 3300 pF
IL = 10 mA, VDD = 3.0 V
VLIM = VREF
IOUT = 2 mA, VDD = 3.0 V
IOUT = 2 mA, VDD = 3.0 V
PWM not switching
−40°C ≤ TA ≤ +85°C
SYNCI/SD = 0 V
VSS = 0 V
Low to high threshold
SYNCI/SD = VDD, SS/SB = 0 V
SYNCI/SD = VDD
VCM1 = 1.5 V, VIN1P − VIN1M
VCM2 = 1.5 V, VIN2P − VIN2M
VCM1, VCM2 = 0.2 V to VDD − 0.2 V
3.0 V ≤ VDD ≤ 5.0 V
Sourcing and sinking
VOUT = 0.5 V to (VDD − 1 V)
SYNCI/SD connected to external
clock
COMPOSC = VDD, RFREQ = 118 kΩ,
SYNCI/SD = VDD, VDD = 5.0 V
COMPOSC = VDD, SYNCI/SD = VDD
VPHASE = 0.13 V, fSYNCI/SD = 1 MHz
VPHASE = 2.3 V, fSYNCI/SD = 1 MHz
PHASE = open
IREF = 2 mA
IREF = 0 mA
Min Typ Max
20
40 80
6
0 VDD
200
100
0 VDD
3.0 5.5
8 12
15
8
8
2.2 2.6
2
150 200
0
VDD − 0.03
10
10
120
110
5
2
100
100
VDD
25
300 1000
800 1000 1250
200 1000
50
330
180
2.35
2.37 2.47 2.57
Unit
ns
ns
Ω
V
Ω
Ω
V
V
mA
mA
µA
µA
V
mA
mV
μV
μV
V
dB
V
mV
dB
mA
MHz
kHz
kHz
kHz
Degrees
Degrees
Degrees
V
V
Rev. A | Page 4 of 20
5 Page 
ADN8831
740
VDD = 5V
720
700
680
660
640
–40 –15
10
35
60
TEMPERATURE (°C)
Figure 10. Switching Frequency vs. Temperature
85
Data Sheet
15
VDD = 5V
TA = 25°C
12
9
6
3
0
200 400 600 800
SWITCHING FREQUENCY (kHz)
Figure 11. Supply Current vs. Switching Frequency
1000
Rev. A | Page 10 of 20
11 Page | ||
| Páginas | Total 21 Páginas | |
| PDF Descargar | [ Datasheet ADN8831.PDF ] | |
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