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PDF APW7068 Data sheet ( Hoja de datos )

Número de pieza APW7068
Descripción Synchronous Buck PWM and Linear Controller
Fabricantes Anpec Electronics Coropration 
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APW7068
Synchronous Buck PWM and Linear Controller with 0.8V Reference Out Voltage
Features
General Description
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Two Regulated Voltages and REF_OUT
- Synchronous Buck Converter
- Linear Regulator
- REF_OUT = 0.8V±1% with 3mA source current
Single 12V Power Supply Required
Excellent Both Output Voltage Regulation
- 0.8V Internal Reference
- ±1% Over Line Voltage and Temperature
Integrated Soft-Start for PWM and Linear Outputs
300KHz Fixed Switching Frequency
Voltage Mode PWM Control Design and Up to
89%(Typ.) Duty Cycle
Under-Voltage Protection Monitoring Linear
Output
Over-Voltage Protection Monitoring PWM Output
Over-Current Protection for PWM Output
- Sense Low-side MOSFET’s RDS(ON)
SOP-14, QSOP-16 and QFN-16 packages
Lead Free Available (RoHS Compliant)
Applications
Graphic Cards
The APW7068 integrates synchronous buck
PWM, linear controller, and 0.8V Reference Out Voltage,
as well as the monitoring and protection functions
into a single package. The fixed 300KHz switching
frequency synchronous PWM controller drives
dual N-channel MOSFETs, which provides one controlled
power output with over-voltage and over-current
protections. Linear controller drives an external
N-channel MOSFET with under-voltage protection.
The APW7068 provides excellent regulation for
output load variation. An internal 0.8V temperature-
compensated reference voltage is designed to meet
the requirement of low output voltage applications.
The APW7068 with excellent protection functions:
POR, OCP, OVP and UVP. The Power-On Reset
(POR) circuit can monitor VCC12 supply voltage
exceeds its threshold voltage while the controller is
running, and a built-in digital soft-start provides both
outputs with controlled rising voltage. The Over-Current
Protection (OCP) monitors the output current by using
the voltage drop across the lower MOSFET’s RDS(ON),
comparing with the voltage of OCSET pin. When the out-
put current reaches the trip point, the controller will
shutdown the IC directly, and latch the converter’s
output. The Under-Voltage Protection (UVP) monitors
the voltage of FBL pin for short-circuit protection. When
the VFBL is less than 50% of VREF, the controller will
shutdown the IC directly. The Over-Voltage Protection
(OVP) monitors the voltage of FB. When the VFB is
over 135% of VREF, the controller will make Low-
side gate signal fully turn on until the fault events are
removed.
ANPEC reserves the right to make changes to improve reliability or manufacturability without notice, and
advise customers to obtain the latest version of relevant information to verify before placing orders.
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Jun., 2006
1
www.anpec.com.tw

1 page




APW7068 pdf
APW7068
Electrical Characteristics (Cont.)
Unless otherwise specified, these specifications apply over VCC12=12V, and TA =-20~70°C. Typical values
are at TA=25°C.
Symbol
Parameter
Test Conditions
APW7068
Unit
Min Typ Max
REFERENCE
VREF
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Reference Voltage
Reference Voltage Tolerance
PWM Load Regulation
Linear Load Regulation
PWM ERROR AMPLIFIER
for Error Amp1 and Amp2
IOUT1=0 to 10A
IOUT2=0 to 3A
0.792 0.80 0.808
-1 +1
1
1
V
%
%
%
Gain Open Loop Gain
GBWP Open Loop Bandwidth
SR Slew Rate
FB Input Current
VCOMP COMP High Voltage
VCOMP COMP Low Voltage
ICOMP COMP Source Current
ICOMP COMP Sink Current
GATE DRIVERS
RL=10k, CL=10pF (NOTE3)
RL=10k, CL=10pF (NOTE3)
RL=10k, CL=10pF (NOTE3)
VFB=0.8V
COMP=2V
COMP=2V
93 dB
20 MHz
8 V/us
0.1 1 uA
5V
0V
12 mA
12 mA
IUGATE
IUGATE
Upper Gate Source Current
Upper Gate Sink Current
BOOT=12V,
UGATE-PHASE = 2V
2.5 A
2A
ILGATE
ILGATE
Lower Gate Source Current
Lower Gate Sink Current
VCC12=12V, LGATE=2V
RUGATE Upper Gate Source Impedance BOOT=12V, IUGATE=0.1A
RUGATE Upper Gate Sink Impedance BOOT=12V, IUGATE=0.1A
RLGATE Lower Gate Source Impedance VCC12=12V, ILGATE=0.1A
RLGATE Lower Gate Sink Impedance VCC12=12V, ILGATE=0.1A
TD Dead Time
LINEAR REGULATOR
2.5
3.5
2.25 3.375
0.7 1.05
2.25 3.375
0.4 0.6
20
A
A
nS
Gain
GBWP
SR
VDRIVE
VDRIVE
IDRIVE
IDRIVE
Open Loop Gain
Open Loop Bandwidth
Slew Rate
FBL Input Current
DRIVE High Voltage
DRIVE Low Voltage
DRIVE Source Current
DRIVE Sink Current
RL=10k, CL=10pF (NOTE3)
RL=10k, CL=10pF (NOTE3)
RL=10k, CL=10pF (NOTE3)
VFBL=0.8V
DRIVE=5V
DRIVE=5V
70 dB
19 MHz
6 V/us
0.1 1 uA
10 V
0V
4 mA
3 mA
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Jun., 2006
5
www.anpec.com.tw

5 Page





APW7068 arduino
APW7068
Typical Characteristics (Cont.)
CH1
www.DataSheet4U.coCmH2
Over Current Protection
VCC12=12V, Vin1=12V,
Vo1=1.2V,Vin2=3.3V,
Vo2=2.5V, L=1uH,
C =470uFx2
OUT
Rocset=1K , Rds(on)=4m
CH1
CH2
Short Test after Power Ready
VCC12=12V, Vin1=12V,
Vo1=1.2V,Vin2=3.3V,
Vo2=2.5V, L=1uH, COUT=470uFx2
Rocset=1K , Rds(on)=4m
CH3
CH4
CH1: Vo1 (1V/div)
CH2: Drive (5V/div)
CH3: Ug (20V/div)
CH4: IL (10A/div)
Time: 50us/div
CH3
CH4
CH1: Vo1 (1V/div)
CH2: Drive (5V/div)
CH3: Ug (20V/div)
CH4: IL (10A/div)
Time: 50us/div
Short Test before Power On
CH1
VCC12=12V, Vin1=12V,Vin2=3.3V
Vo1=1.2V,Vo2=2.5V,L=1uH
C =470uFx2
OUT
CH2
CH3
CH4
CH1: VCC12 (10V/div)
CH2: Vo1 (1V/div)
CH3: Ug (20V/div)
CH4: IL (10A/div)
Time: 2ms/div
Copyright © ANPEC Electronics Corp.
Rev. A.2 - Jun., 2006
VREF vs. Junction Temperature
0.804
0.8035
0.803
0.8025
0.802
0.8015
VREF
0.801
0.8005
-40 -20
0
20 40 60 80 100 120
Junction Temperature (°C )
11 www.anpec.com.tw

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