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Número de pieza | AN2540 | |
Descripción | Synchronizing Instructions | |
Fabricantes | Freescale Semiconductor | |
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Application Note
Freescale Semiconductor, Inc.
AN2540/D
Rev. 0.1, 6/2003
Synchronizing Instructions for
PowerPC™ Instruction Set
Architecture
The architecture for the PowerPC™ Instruction Set provides two types of synchronizing
instructions: context-synchronizing and execution-synchronizing instructions. All of the
information in this application note is covered in more detail in PowerPC™ Microprocessor
Family: The Programming Environments for 32-Bit Processors.
1 Context-Synchronizing Instructions
Context-synchronizing instructions for PowerPC include isync, sc, and rfi. In addition,
exceptions can cause context synchronization. These instructions can be used to ensure that
the effects of all previously issued instructions are in place before a context switch, and that
the context switch takes effect for instructions after the switch. Context synchronization
should be performed when changing the values in certain fields of certain processor registers,
as shown in Table 1.
The context-synchronizing instructions ensure that the following conditions occur:
• Instruction dispatching is halted. The sc instruction also ensures that no higher
priority exception exists.
• All previously issued instructions have completed, at least to a point where they are
no longer able to cause an exception. However, memory accesses that these
instructions cause need not have completed with respect to other processors and
mechanisms. The sync instruction can be used to ensure that memory accesses are
complete.
• Instructions that were previously issued complete in the context in which they were
issued (privilege, protection, address translation).
• Instructions that are issued after the synchronizing instruction execute in the new
context.
To ensure that context changes occur for instructions after the synchronization, the instruction
queue is flushed and all these instructions are refetched with the new context in place.
NOTE
All context-synchronizing instructions are execution-
synchronizing.
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MOTOROLA Synchronizing Instructions for PowerPC™ Instruction Set Architecture
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