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PDF STI7109 Data sheet ( Hoja de datos )
| Número de pieza | STI7109 | |
| Descripción | Low-cost HDTV set-top box decoder | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STi7109
Low-cost HDTV set-top box decoder for H.264 and Microsoft WMA9
Data Brief
Features
■ The STi7109 is a single-chip, high-definition
video decoder including:
– Microsoft® VC-1, WMA9 and H.264
support
– Linux®, Windows® CE and OS21
compatible ST40 CPU core: 266 MHz
– transport filtering and descrambling
– video decoder: VC-1 (including WMA 9),
H.264 (MPEG-4 part 10) and MPEG-2
– SVP compliant
– Windows® DRM support
– graphics engine and dual display: standard
and high-definition
– audio decoder: including Windows Media®
Audio 9 (WMA-9) and WMA-9 Pro
– DVD data retrieval and decryption
■ The STi7109 also features the following
embedded interfaces:
– USB 2.0 host controller/PHY interface
– DVI/HDMI™ output
– digital audio and video auxiliary inputs
– low-cost modem
– 100BT ethernet controller with integrated
MAC and MII/RMII interface for external
PHY
– serial ATA (SATA)
5 x 2-ch
DDR
PCM out S/PDIF
SDRAM 2-ch AudioL
PCM in AudioR
SD
video in
ST40 core 266 MHz
UDI 16 K Icache
32 32
Video
LMI
MMU
Int. control
32 K Dcache
System
LMI
Audio
DACs
Audio decoder
and interfaces
ST231
core
Serial
ATA
interface
Digital
video input
USB
2.0
Peripheral I/O
and external interrupts
2x I/F
SmCard
6x GPIO
IR
Tx/Rx
ILC
MAFE
interface
4x
UARTs
PWM
3x
SSCs
STBus
2 x PDES
PTI PTI
TSmerger/router
CP
FDMA
Clock
generator
and system
services
Video decoder
VC-1 (inc WMV-9)
H264/MPEG-2
ST231
core
2D gamma
blitter
CUR 3 x GDP
Display
compositor
Ethernet,
MII/RMII
DVI-HDCP
HDMI
Output stage DENC
DACs
DACs
DEI
Main video
display
Aux video
display
EMI EMPI
TSIN0 TSIN1 TS I/O
NRSS-A
MII/RMII for 100BT
Ethernet
TMDS main video
output (HD)
Main video Aux video
output (HD) output (SD)
YPbPr
YC/CVBS
Flash
or companion chip
December 2006
Rev 2
For further information contact your local STMicroelectronics sales office.
1/9
www.st.com
9
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STi7109
Description
1.1
1.1.1
1.1.2
1.1.3
Detailed features list
Processor subsystem
● ST40 32-bit superscaler RISC CPU
– 266 MHz, 2-way set associative 16-Kbyte ICache, 32-Kbyte DCache, MMU
– 5-stage pipeline, delayed branch support
– floating point unit, matrix operation support
– debug port, interrupt controller
Transport subsystem
● TS merger/router
– 2 serial/parallel inputs
– 1 bidirectional interface
– merging of 3 external transport streams
– transport streams from memory support
– NRSS-A module interface
– TS routing for DVB-CI and CableCARD™ modules
● Programmable transport interfaces (PTIs)
– two programmable transport interfaces
– two transport stream demultiplexers: DVB, DIRECTV®, ATSC, ARIB, OpenCable,
DCII
– integrated DES, AES, DVB and Multi2 descramblers
– NDS random access scrambled stream protocol (RASP) compliant
– NDS ICAM CA
– support for VGS, Passage and DVS042 residue handling
Video/graphics subsystem
● Microsoft VC-1 MP@HL (WMV 9) and AP@L3/H.264(MPEG-4 part 10) main and high
profile level 4.1/MPEG-2 MP@HL video decoder
– advanced error concealment and trick mode support
– dual MPEG-2 MP@HL decode
● SD (standard package) or HD/SD (extended package) digital video input
● Displays
– one HD display multi format capable (1080I, 720P, 480P/576P, 480I/576I)
- analog HD output RGB or YPbPr
- HDMI encoded output
– one standard-definition display
- analog SD output: YPbPr or YC and CVBS
● Gamma 2D/3D graphics processor
– triple source 2D gamma blitter engine
– alpha blending and logical operations
– color space and format conversion
5/9
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet STI7109.PDF ] | |
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