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PDF LMH6515 Data sheet ( Hoja de datos )
| Número de pieza | LMH6515 | |
| Descripción | Digital Controlled / Variable Gain Amplifier | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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www.DataSheet4U.com
September 2007
LMH6515
600 MHz, Digital Controlled, Variable Gain Amplifier
General Description
The LMH6515 is a high performance, digitally controlled vari-
able gain amplifier (DVGA). It combines precision gain control
with a low noise, ultra-linear, differential amplifier. Typically,
the LMH6515 drives a high performance ADC in a broad
range of mixed signal and digital communication applications
such as mobile radio and cellular base stations where auto-
matic gain control (AGC) is required to increase system dy-
namic range. When used in conjunction with a high speed
ADC, system dynamic range can be extended by up to 32 dB.
The LMH6515 has a differential input and output allowing
large signal swings on a single 5V supply. It is designed to
accept signals from RF elements and maintain a terminated
impedance environment. The input impedance is 200Ω re-
sistive. The output impedance is either 200Ω or 400Ω and is
user selectable. A unique internal architecture allows use with
both single ended and differential input signals.
Input signals to the LMH6515 are scaled by a highly linear,
digitally controlled attenuator with 31 accurate 1 dB steps.
The attenuator output provides the input signal for a high gain,
ultra linear differential transconductor. The transconductor
differential output current can be converted into a voltage by
using the on-chip 200Ω or 400Ω loads. The transconductance
gain is 0.1 Amp/Volt resulting in a maximum voltage gain of
+26 dB when driving a 200Ω load, or 32 dB when driving the
400Ω load. On chip digital latches are provided for local stor-
age of the gain setting. The gain step settling time is 5 ns and
care has been taken to reduce the sensitivity of bandwidth
and phase to gain setting.
The LMH6515 operates over the industrial temperature range
of −40°C to +85°C. The LMH6515 is available in a 16-Pin,
thermally enhanced, LLP package.
Features
■ Adjustable gain with a 31 dB range
■ Precise 1 dB gain steps
■ Parallel 5 bit gain control
■ On chip register stores gain setting
■ Fully differential signal path
■ Single ended to differential capable
■ 200Ω input impedance
■ Small footprint (4 mm x 4 mm) LLP package
Key Specifications
■ 600 MHz bandwidth @ 100Ω load
■ 40 dBm OIP3 @ 75 MHz, 200Ω load
■ 20 dB to 30 dB maximum gain
■ Selectable output impedance of 200Ω or 400Ω.
■ 8.3 dB noise figure
■ 5 ns gain step switching time
■ 100 mA supply current
Applications
■ Cellular base stations
■ IF sampling receivers
■ Instrumentation
■ Modems
■ Imaging
■ Differential line receiver
Typical Application
LMH™ is a trademark of National Semiconductor Corporation.
© 2007 National Semiconductor Corporation 202143
20214301
www.national.com
1 page  
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Pin Descriptions
Pin Number
Analog I/O
6
Symbol
IN+
7 IN−
15 OUT−
14 OUT+
16 LOAD−
13 LOAD+
Power
3
5,8
VCC
GND
Digital Inputs
1,12,11,
10,9
2
GAIN_0 to
GAIN_4
LATCH
4 NC
Description
Non-inverting analog input. Internally biased to 1.4V. Input voltage should not exceed
VCC or go below GND by more than 0.5V.
Inverting analog input. Internally biased to 1.4V. Input voltage should not exceed VCC or
go below GND by more than 0.5V. If using amplifier single ended this input should be
capacitively coupled to ground.
Open collector inverting output. This pin is an output that also requires a power source.
This pin should be connected to 5V through either an RF choke or an appropriately sized
inductor that can form part of a filter. See application section for details.
Open collector non-inverting output. This pin is an output that also requires a power
source. This pin should be connected to 5V through either an RF choke or an
appropriately sized inductor that can form part of a filter. See application section for
details.
Internal 200Ω resistor connection to pin 15. This pin can be left floating for higher gain
or shorted to pin 13 for lower gain and lower effective output impedance. See application
section for details.
Internal 200Ω resistor connection to pin 14. This pin can be left floating for higher gain
or shorted to pin 16 for lower gain and lower effective output impedance. See application
section for details.
5V power supply pin. Use ceramic, low ESR bypass capacitors. This pin powers
everything except the output stage.
Ground pins. Connect to low impedance ground plane. All pin voltages are specified with
respect to the voltage on these pins. The exposed thermal pad is also a ground
connection.
Gain setting pins. See above table for gain step sizes for each pin. These pins are 3.3V
CMOS logic compatible. 5V inputs may cause damage.
This pin controls the function of the gain setting pins mentioned above. With LATCH in
the logic HIGH state the gain is fixed and will not change. With the LATCH in the logic
LOW state the gain is set by the state of the gain control pins. Any changes in gain made
with the LATCH pin in the LOW state will take effect immediately. This pin is 3.3V CMOS
logic compatible. 5V inputs may cause damage.
This pin is not connected. It can be grounded or left floating.
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common mode and output common mode voltages must be
taken into account.
Maximum bandwidth with the LMH6515 is achieved by using
the low gain, low impedance output option and using a low
load resistance. With an effective load of 67Ω a bandwidth of
nearly a 1 GHz can be realized. As the effective resistance
on the output stage goes up the capacitance of the board
traces and amplifier output stage limit bandwidth in a roughly
linear fashion. At an output impedance of 100Ω the bandwidth
is down to 600 MHz, and at 200Ω the bandwidth is 260 MHz.
For this reason driving very high impedance loads is not rec-
ommended.
Although bandwidth goes down with higher values of load re-
sistance, the distortion performance improves and gain in-
creases. The LMH6515 has a common emitter Class A output
stage and minimizing the amount of current swing in the out-
put devices improves distortion substantially.
The LMH6515 output stage is powered through the collectors
of the output transistors. Power for the output stage is fed
through inductors and the reactance of the inductors allows
the output voltage to develop. In Figure 1 the inductors are
shown with a value of 44.4 nH. The value of the inductors
used will be different for different applications. In Figure 1 the
inductors have been chosen to resonate with the ADC and
the load capacitor to provide a weak band pass filter effect.
For broad band applications higher value inductors will allow
for better low frequency operation. However, large valued in-
ductors will reduce high frequency performance, particularly
inductors of small physical sizes like 0603 or smaller. Larger
inductors will tend to perform better than smaller ones of the
same value even for narrow band applications. This is be-
cause the larger inductors will have a lower DC resistance
and less inter-winding capacitance and hence a higher Q and
a higher self resonance frequency. The self resonance fre-
quency should be higher than any desired signal content by
at least a factor of 2. Another consideration is that the power
inductors and the filter inductors need to be placed on the
circuit board such that their magnetic fields do not cause cou-
pling. Mutual coupling of inductors can compromise filter
characteristics and lead to unwanted distortion products.
20214315
FIGURE 2. Bandwidth Changes Due to Different Inductor
Values
DIGITAL CONTROL
The LMH6515 has 32 gain settings covering a range of 31 dB.
To avoid undesirable signal transients the LMH6515 should
be powered on at the minimum gain state (all logic input pins
at 0V). The LMH6515 has a 5-bit gain control bus as well as
a Latch pin. When the Latch pin is low data from the gain
control pins is immediately sent to the gain circuit (i.e. gain is
changed immediately). When the Latch pin transitions high
the current gain state is held and subsequent changes to the
gain set pins are ignored. To minimize gain change glitches
multiple gain control pins should not change while the latch
pin is low. In order to achieve the very fast gain step switching
time of 5 ns the internal gain change circuit is very fast. Gain
glitches could result from timing skew between the gain set
bits. This is especially the case when a small gain change
requires a change in state of three or more gain control pins.
If continuous gain control is desired the latch pin can be tied
to ground. This state is called transparent mode and the gain
pins are always active. In this state the timing of the gain pin
logic transitions should be planned carefully to avoid unde-
sirable transients.
The LMH6515 was designed to interface with 3.3V CMOS
logic circuits. If operation with 5V logic is required a simple
voltage divider at each logic pin will allow for this. To properly
terminate 100Ω transmission lines a divider with a 66.5Ω re-
sistor to ground and a 33.2Ω series resistor will properly
terminate the line as well as give the 3.3V logic levels. Care
should be taken not to exceed the 3.6V absolute maximum
voltage rating of the logic pins.
EXPOSED PAD LLP PACKAGE
The LMH6515 is packaged in a thermally enhanced package.
The exposed pad is connected to the GND pins. It is recom-
mended, but not necessary, that the exposed pad be con-
nected to the supply ground plane. In any case, the thermal
dissipation of the device is largely dependent on the attach-
ment of this pad. The exposed pad should be attached to as
much copper on the circuit board as possible, preferably ex-
ternal copper. However, it is also very important to maintain
good high speed layout practices when designing a system
board. Please refer to the LMH6515 evaluation board for sug-
gested layout techniques.
Package information is available on the National web site.
http://www.national.com/packaging/folders/sqa16a.html
INTERFACING TO ADC
The LMH6515 was designed to be used with high speed
ADCs such as the ADC14155. As shown in the Typical Ap-
plication on page 1, AC coupling provides the best flexibility
especially for IF sub-sampling applications. Any resistive net-
works on the output will also cause a gain loss because the
output signal is developed across the output resistors. The
chart Maximum Gain vs. External Load shows the change in
gain when an external load is added.
The inputs of the LMH6515 will self bias to the optimum volt-
age for normal operation. The internal bias voltage for the
inputs is approximately 1.4V. In most applications the
LMH6515 input will need to be AC coupled.
11 www.national.com
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| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet LMH6515.PDF ] | |
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