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PDF ISL6567 Data sheet ( Hoja de datos )
| Número de pieza | ISL6567 | |
| Descripción | Multipurpose Two-Phase Buck PWM Controller | |
| Fabricantes | Intersil Corporation | |
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®
Data Sheet
March 20, 2007
ISL6567
FN9243.2
Multipurpose Two-Phase Buck PWM
Controller with Integrated MOSFET
Drivers
The ISL6567 two-phase synchronous buck PWM control IC
provides a precision voltage regulation system for point-of-
load and other high-current applications requiring an efficient
and compact implementation. Multi-phase power conversion
is a marked departure from single phase converter
configurations employed to satisfy the increasing current
demands of various electronic circuits. By distributing the
power and load current, implementation of multi-phase
converters utilize smaller and lower cost transistors with
fewer input and output capacitors. These reductions accrue
from the higher effective conversion frequency with higher
frequency ripple current resulting from the phase
interleaving inherent to this topology.
Outstanding features of this controller IC include an internal
0.6V reference with a system regulation accuracy of ±1%, an
optional external reference input, and user-adjustable
switching frequency. Precision regulation is further
enhanced by the available unity-gain differential amplifier
targeted at remote voltage sensing capability, while output
regulation is monitored and its quality is reported via a
PGOOD pin. Also included, an internal shunt regulator with
optional external connection capability extends the
operational input voltage range. For applications requiring
voltage tracking or sequencing, the ISL6567 offers a host of
possibilities, including coincidental, ratiometric, or offset
tracking, as well as sequential start-ups, user adjustable for
a wide range of applications.
Protection features of this controller IC include overvoltage
and overcurrent protection. Overvoltage results in the
converter turning the lower MOSFETs ON to clamp the rising
output voltage. The ISL6567 uses cost and space-saving
rDS(ON) sensing for channel current balance, dynamic
voltage positioning, and overcurrent protection. Channel
current balancing is automatic and accurate with the
integrated current-balance control system. Overcurrent
protection can be tailored to various application with no need
for additional parts.
Features
• Integrated Two-Phase Power Conversion
- Integrated 4A Drivers for High Efficiency
• Shunt Regulator for Wide Input Power Conversion
- 5V and Higher Bias
- Up to 20V Power Down-Conversion
• Precision Channel Current Sharing
- Loss-Less Current Sampling - Uses rDS(ON)
• Precision Output Voltage Regulation
- ±0.6% System Accuracy Over Temperature
(Commercial Range)
• 0.6V Internal Reference
• Full Spectrum Voltage Tracking
- Coincidental, Ratiometric, or Offset
• Sequential Start-up Control
• Adjustable Switching Frequency
- 150kHz to 1.5MHz
• Fast Transient Recovery Time
• Unity-Gain Differential Amplifier
- Increased Voltage Sensing Accuracy
• Overcurrent Protection
• Overvoltage Protection
• Start-up into Pre-Charged Output
• Small, QFN Package Footprint
• Pb-Free Plus Anneal Available (RoHS Compliant)
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2005-2007. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL6567
Absolute Maximum Ratings
Supply Voltage, VCC, PVCC . . . . . . . . . . . . . . . . . . . -0.3V to +6.5V
Shunt Regulator Voltage, VVREG . . . . . . . . . . . . . . . -0.3V to +6.5V
Boot Voltage, VBOOT . . . . . . . . . . . . . PGND - 0.3V to PGND + 27V
Phase Voltage, VPHASE . . . . . . . . . . VBOOT - 7V to VBOOT + 0.3V
Upper Gate Voltage, VUGATE . . . . VPHASE - 0.3V to VBOOT + 0.3V
Lower Gate Voltage, VLGATE. . . . . . . . PGND - 0.3V to VCC + 0.3V
Input, Output, or I/O Voltage . . . . . . . . . GND - 0.3V to VCC + 0.3V
ESD Classification . . . . . . . . . . . . . . . . . . HBM Class 1 JEDEC STD
Recommended Operating Conditions
Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . +4.9V to +5.5V
Ambient Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to +70°C
Thermal Information
Thermal Resistance
θJA (°C/W) θJC (°C/W)
QFN Package (Notes 1, 2). . . . . . . . . .
43
7
Maximum Junction Temperature . . . . . . . . . . . . . . . . . . . . . . +150°C
Maximum Storage Temperature Range . . . . . . . . . .-65°C to +150°C
Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . +300°C
CAUTION: Stress above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational section of this specification is not implied.
NOTES:
1. θJA is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. See
Tech Brief TB379.
2. For θJC, the “case temp” location is the center of the exposed metal pad on the package underside.
Electrical Specifications Operating Conditions: VCC = 5V, TJ = -40°C to +85°C, Unless Otherwise Specified
PARAMETER
TEST CONDITIONS
MIN TYP
BIAS SUPPLY AND INTERNAL OSCILLATOR
Input Bias Supply Current
Rising VCC POR (Power-On Reset) Threshold
IVCC; EN > 0.7V; LGATE, UGATE open
- 7.6
4.30 4.40
VCC POR Hysteresis
0.46 0.51
Rising PVCC POR Threshold
3.60 3.67
Shunt Regulation
Maximum Shunt Current
Switching Frequency (per channel; Note 4)
Frequency Tolerance
Oscillator Peak-to-Peak Ramp Amplitude
Maximum Duty Cycle
CONTROL THRESHOLDS
VVCC; IVREG = 0 to 120mA
IVREG_MAX
FSW
FSW
VOSC
dMAX
4.90
120
200
-10
-
-
5.10
-
-
-
1.4
66
EN Threshold
- 0.65
EN Hysteresis Current
- 20
MON Power-Good Enable Threshold
MON Hysteresis Current
VMON_TH
290 305
- 10
SOFT-START
SS Current
SS Ramp Amplitude
ISS
- 22
0.55 -
SS Threshold for Output Gates Turn-Off
0.40 -
REFERENCE AND DAC
System Accuracy (Commercial Temp. Range)
-0.6 -
System Accuracy (Industrial Temp. Range)
-0.8 -
Internal Reference
External Reference DC Amplitude Range
External Reference DC Offset Range
VREF
VREFTRK (DC)
VREFTRK (DC) offset
- 0.6
0.1 -
-4.5 -
MAX UNITS
9
4.50
0.58
3.75
5.35
-
2000
10
-
-
mA
V
V
V
V
mA
kHz
%
V
%
-V
- μA
320 mV
- μA
- μA
3.60 V
-V
0.6 %
0.8 %
-V
2.3 V
4.5 mV
5 FN9243.2
March 20, 2007
5 Page 
ISL6567
the MOSFET on, the lower MOSFET drive turns the
freewheeling element off. The upper MOSFET is kept on
until the clock signals the beginning of the next switching
cycle and the PWM pulse is terminated.
CURRENT SENSING
ISL6567 senses current by sampling the voltage across the
lower MOSFET during its conduction interval. MOSFET
rDS(ON) sensing is a no-added-cost method to sense current
for load line regulation, channel current balance, module
current sharing, and overcurrent protection.
The ISEN pins are used as current inputs for each channel.
Internally, a virtual ground is created at the ISEN pins. The
RISEN resistors are used to size the current flow through the
ISEN pins, proportional to the lower MOSFETs’ rDS(ON)
voltage, during their conduction periods. The current thus
developed through the ISEN pins is internally averaged, then
the current error signals resulting from comparing the
average to the individual current signals are used for
channel current balancing.
Select the value for the RISEN resistors based on the room
temperature rDS(ON) of the lower MOSFETs and the full-load
total converter output current, IFL. As this current sense path
RISEN
=
5-r--D-0---S--×--(-1-O--0---N-–--6-)-
⋅
-I-F----L-
2
is also used for OC detection, ensure that at maximum
power train temperature rise and maximum output current
loading the OC protection is not inadvertently tripped. OC
protection current level through the ISEN pins is listed in the
Electrical Specifications table.
CHANNEL-CURRENT BALANCE
Another benefit of multi-phase operation is the thermal
advantage gained by distributing the dissipated heat over
multiple devices and greater area. By doing this, the
designer avoids the complexity of driving multiple parallel
MOSFETs and the expense of using expensive heat sinks
and exotic magnetic materials.
All things being equal, in order to fully realize the thermal
advantage, it is important that each channel in a multi-phase
converter be controlled to deliver about the same current at
any load level. Intersil’s ISL6567 ensure current balance by
comparing each channel’s current to the average current
delivered by both channels and making appropriate
adjustments to each channel’s pulse width based on the
resultant error. The error signal modifies the pulse width to
correct any unbalance and force the error toward zero.
Conversely, should a channel-to-channel imbalance be
desired, such imbalance can be created by adjusting the
individual channel’s RISEN resistor. Asymmetrical layouts,
where one phase of the converter is naturally carrying more
current than the other, or where one of the two phases is
subject to a more stringent thermal environment limiting its
current-carrying capability, are instances where this
adjustment is particularly useful, helping to cancel out the
design-intrinsic thermal or current imbalances.
SOFT-START
The soft-start function allows the converter to bring up the
output voltage in a controlled fashion, resulting in a linear
ramp-up. As soon as the controller is fully enabled for
operation, the SS pin starts to output a small current which
charges the external capacitor, CSS, connected to this pin.
An internal reference clamp controlled by the potential at the
SS pin releases the reference to the input of the error
amplifier with a 1:1 correspondence for SS potential
exceeding 0.7V (typically). Figure 5 details a normal
soft-start startup. The following equation helps determine the
approximate time period during which the controlled output
voltage is ramped from 0V to the desired DC-set level.
tSS
=
C-----S----S-----⋅---V----R----E----F--
ISS
VOUT (0.5V/DIV)
VintREF (0.5V/DIV)
GND>
GND>
VSS (1V/DIV)
EN (5V/DIV)
FIGURE 5. NORMAL SOFT-START WAVEFORMS FOR
ISL6567-BASED MULTI-PHASE CONVERTER
Whenever the ISL6567’s power-on reset falling threshold is
tripped, or it is disabled via the EN pin, the SS capacitor is
quickly discharged via an internal pull-down device
(represented as the 1mA, typical, current source).
As the SS pin’s positive excursion is internally clamped to
about 3.5V, insure that any external pull-up device does not
force more than 3mA into this pin.
Should OC protection be tripped while the ISL6567 is
operating in internal-reference mode and the SS pin not be
allowed to fully discharge the SS capacitor, the ISL6567
cannot continue the normal SS cycling.
11 FN9243.2
March 20, 2007
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ISL6567.PDF ] | |
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