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PDF ISL5100A Data sheet ( Hoja de datos )
| Número de pieza | ISL5100A | |
| Descripción | Quad 18V Pin Electronics Driver/Window Comparator | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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®
Data Sheet
October 31, 2005
ISL55100A
FN7486.0
Quad 18V Pin Electronics Driver/Window
Comparator
The ISL55100 is a Quad pin driver and window comparator
fabricated in a wide voltage CMOS process. It is designed
specifically for Test During Burn In (TDBI) applications,
where cost, functional density, and power are all at a
premium.
This IC incorporates four channels of programmable drivers
and window comparators into a small 72 Ld QFN package.
Each channel has independent driver levels, data, and high
impedance control. Each receiver has dual comparators
which provide high and low threshold levels.
The ISL55100 uses differential mode digital inputs, and can
therefore mate directly with LVDS or CML outputs. Single
ended logic families are handled by connecting one of the
digital input pins to an appropriate threshold voltage (e.g.,
1.4V for TTL compatibility). The comparator outputs are
single ended, and the output levels are user defined to mate
directly with any digital technology.
The 18V driver output and receiver input ranges allow this
device to interface directly with TTL, ECL, CMOS (3V, 5V,
and 7V), LVCMOS, and custom level circuitry, as well as the
highwww.DataSheet4U.com voltage (Super Voltage) level required for many special
test modes for Flash Devices.
Functional Block Diagram
QUAD - WIDE RANGE, LOW ROUT, TRI-STATEABLE - DRIVERS
DATA+(0-3)
DATA-(0-3)
DRVEN+(0-3)
DRVEN-(0-3)
+-
+-
VH(0-3)
DOUT(0-3)
VL(0-3)
QUAD - DUAL LEVEL COMPARATOR - RECEIVERS
COMP HIGH
QA(0-3)
COMP LOW
COMP HIGH
QB(0-3)
COMP LOW
VCC
VEE
VCC
VEE
CVA(0-3)
VINP(0-3)
CVB(0-3)
Features
• Low Driver Output Resistance
- ROUT Maximum: ISL55100A 7.0Ω
• 18V I/O Range
• 50MHz Operation
• 4 Channel Driver/Receiver Pairs with Per Pin Flexibility
• Dual Level - Per Pin - Input Thresholds
• Differential or Single Ended Digital Inputs
• User Defined Comparator Output Levels
• Low Channel to Channel Timing Skew
• Small Footprint (72 Ld QFN)
• Pb-Free Plus Anneal Available (RoHS Compliant)
Applications
• Burn In ATE
• Wafer Level Flash Memory Test
• LCD Panel Test
• Low Cost ATE
• Instrumentation
• Emulation
• Device Programmers
Ordering Information
PART
TEMP.
PKG.
PART NO. MARKING RANGE (°C) PACKAGE DWG. #
ISL55100AIRZ ISL55100 -40 to +85 72 Ld QFN L72.10x10
(See Note) AIRZ
(Pb-free)
Add “-T” suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100%
matte tin plate termination finish, which are RoHS compliant and
compatible with both SnPb and Pb-free soldering operations. Intersil
Pb-free products are MSL classified at Pb-free peak reflow
temperatures that meet or exceed the Pb-free requirements of
IPC/JEDEC J STD-020.
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1 page  
ISL55100A
Electrical Specifications Test Conditions: VCC = 12V, VEE = -3V, VH = 6V, VL = 0V, Comp-High = 5V, Comp Low = 0V, V5V = VEE and
LOSWING = VCC, 25°C; Unless Otherwise specified. (Continued)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX
UNITS
ISL55100A Rise/Fall Times (Note 1)
tR, tF 100pF Load ∆V = 0.4V (20% - 80%)
-
2.5
-
∆V = 1V (20% - 80%)
- 2.5
-
ns
ns
∆V = 5V (10% - 90%)
- 2.5
-
ns
∆V = 10V (10% - 90%) - 2.5
-
ns
∆V = 14V (10% - 90%) - 2.5
-
ns
ISL55100A Rise/Fall Times (Note1)
tR, tF
1000pF Load ∆V = 1V (20% - 80%)
∆V = 5V (10% - 90%)
- 8.0
- 10.0
-
-
ns
ns
∆V = 10V (10% - 90%)
- 14.0
-
ns
ISL55100A Maximum Toggle Frequency FMAXD No Load, 50% Symmetry
50 65
-
MHz
ISL55100A Min Driver Pulse Width
ISL55100A Overshoot Lowswing Mode
(Note 1)
tWIDD
OS
Standard Load, 1K/100pF
Lowswing Enabled, (VH-VL<2v)
7.7
- 20mV+
10% of
output
swing
-
ns
%+V
5 FN7486.0
October 31, 2005
5 Page 
ISL55100A
Typical Performance Curves Device installed on Intersil ISL55100 Evaluation Board. (Continued)
DRVEN
0
DATA IN
0
0
VCC 12.0 VH 6.0
VEE - 3.0 VL 0.0
DRIVER OUT
20ns/DIV
FIGURE 8. DATA/HIZ/DRIVER OUT TIMING
56.0
VH (6.00V) ROUT: DRIVER SOURCES 200mA
5.0
4.0
3.0 VL (0.0V) ROUT: DRIVER SINKS 200mA
2.0
1.0
0.0
12
13 14 15 16 17
VCC-VEE VOLTS (VEE -3.0 FIXED)
FIGURE 9. ROUT vs DEVICE VOLTAGE
18
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
1
VH (1V-15V) ROUT: DRIVER SOURCES 200mA
VL (0.0V FIXED) ROUT: DRIVER SINKS 200mA
2 3 4 5 6 7 8 9 10 11 12 13 14 15
VH VOLTS (VL = 0.0)
FIGURE 10. ROUT vs VH RAIL
20.0
18.0
16.0
2200pF
14.0
1000pF
12.0
10.0
8.0
680pF
1K/100pF
6.0
4.0
2.0
0.0 1 2 3 4 5 6 7 8 9 10 11 12 13 14
VH VOLTS (VL = 0.0)
FIGURE 11. PROPAGATION DELAY vs VH RAIL, VARIOUS
LOADS
30.0
27.0
24.0
21.0
2200pF
18.0
15.0
12.0
1000pF
9.0 680pF
6.0
3.0 1K/100pF
0.0
1 2 3 4 5 6 7 8 9 10 11 12 13 14
VH VOLTS (VL = 0.0)
FIGURE 12. DRIVER FALL TIME vs VH RAIL, VARIOUS LOADS
20.0
18.0
16.0
14.0
12.0
COMPARATOR TPD NO LOAD
10.0
8.0 DRIVER TPD NO LOAD
6.0
4.0
2.0
0.0 11 12 13 14 15 16 17 18 19
VCC-VEE (VEE = -3.0)
FIGURE 13. DRIVER & RECEIVER TPD VARIANCE vs VCC
11 FN7486.0
October 31, 2005
11 Page | ||
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| PDF Descargar | [ Datasheet ISL5100A.PDF ] | |
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