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PDF CS5156 Data sheet ( Hoja de datos )

Número de pieza CS5156
Descripción CPU 5-Bit Nonsynchronous Buck Controller
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CS5156
CPU 5−Bit Nonsynchronous
Buck Controller
The CS5156 is a 5bit nonsynchronous NChannel buck controller.
It is designed to provide unprecedented transient response for today’s
demanding highdensity, highspeed logic. The regulator operates
using a proprietary control method, which allows a 100 ns response
time to load transients. The CS5156 is designed to operate over a
4.2516 V range (VCC) using 12 V to power the IC and 5.0 V as the
main supply for conversion.
The CS5156 is specifically designed to power Pentium® II
processors and other high performance core logic. It includes the
following features: on board, 5bit DAC, short circuit protection,
1.0% output tolerance, VCC monitor, and programmable Soft Start
capability. The CS5156 is backwards compatible with the 4bit
CS5151, allowing the mother board designer the capability of using
either the CS5151 or the CS5156 with no change in layout. The
CS5156 is available in 16 pin surface mount and DIP packages.
Features
NChannel Design
Excess of 1.0 MHz Operation
100 ns Transient Response
5Bit DAC
Backward Compatible with 4Bit CS5150/CS5151
30 ns Gate Rise/Fall Times
1.0% DAC Accuracy
5.0 V & 12 V Operation
Remote Sense
Programmable Soft Start
Lossless Short Circuit Protection
VCC Monitor
Adaptive Voltage Positioning
V2Control Topology
Current Sharing
Overvoltage Protection
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MARKING
DIAGRAMS
16
1
SOIC16
D SUFFIX
CASE 751B
16
CS5156
AWLYWW
1
16
1
DIP16
N SUFFIX
CASE 648
16
CS5156
AWLYYWW
1
A
WL, L
YY, Y
WW, W
= Assembly Location
= Wafer Lot
= Year
= Work Week
PIN CONNECTIONS
1
VID0
VID1
VID2
VID3
SS
VID4
COFF
VFFB
VFB
COMP
LGND
VCC1
NC
PGND
VGATE
VCC2
ORDERING INFORMATION
Device
CS5156GD16
CS5156GDR16
CS5156GN16
Package
Shipping
SO16
SO16
DIP16
48 Units/Rail
2500 Tape & Reel
25 Units/Rail
© Semiconductor Components Industries, LLC, 2006
July, 2006 Rev. 11
1
Publication Order Number:
CS5156/D

1 page




CS5156 pdf
CS5156
ELECTRICAL CHARACTERISTICS (continued) (0°C < TA < +70°C; 0°C < TJ < +85°C; 8.0 V < VCC1 < 14 V; 5.0 V < VCC2 < 14 V;
DAC Code: VID4 = VID2 = VID1 = VID0 = 1; VID3 = 0; CVGATE = 1.0 nF; COFF = 330 pF; CSS = 0.1 μF, unless otherwise specified.)
Characteristic
Test Conditions
Min Typ Max Unit
Supply Current
ICC1
ICC2
Operating ICC1
Operating ICC2
COFF
Normal Charge Time
Extension Charge Time
Discharge Current
Time Out Timer
No Switching
No Switching
VFB = COMP = VFFB
VFB = COMP = VFFB
VFFB = 1.5 V; VSS = 5.0 V
VSS = VFFB = 0
COFF to 5.0 V; VFB > 1.0 V
8.5 13.5 mA
1.6 3.0 mA
8.0 13 mA
2.0 5.0 mA
1.0 1.6 2.2 μs
5.0 8.0 11.0 μs
5.0
mA
Time Out Time
Fault Mode Duty Cycle
VFB = VCOMP; VFFB = 2.0 V;
Record VGATE Pulse High Duration
VFFB = 0V
10 30 50 μs
35 50 65 %
PACKAGE PIN #
SO16, DIP16
1, 2, 3, 4, 6
5
7
8
9
10
11
12
13
14
15
16
PACKAGE PIN DESCRIPTION
PIN SYMBOL
VID0VID4
SS
COFF
VFFB
VCC2
VGATE
PGND
NC
VCC1
LGND
COMP
VFB
FUNCTION
Voltage ID DAC input pins. These pins are internally pulled up to 5.0 V providing
logic ones if left open. VID4 selects the DAC range. When VID4 is High (logic
one), the DAC range is 2.14 V to 3.54 V with 100 mV increments. When VID4 is
Low (logic zero), the DAC range is 1.34 V to 2.09 V with 50 mV increments. VID0
VID4 select the desired DAC output voltage. Leaving all 5 DAC input pins open
results in a DAC output voltage of 1.244 V, allowing for adjustable output volt-
age, using a traditional resistor divider.
Soft Start Pin. A capacitor from this pin to LGND in conjunction with internal 60 μA
current source provides Soft Start function for the controller. This pin disables fault
detect function during Soft Start. When a fault is detected, the Soft Start capacitor
is slowly discharged by internal 2.0 μA current source setting the time out before
trying to restart the IC. Charge/discharge current ratio of 30 sets the duty cycle for
the IC when the regulator output is shorted.
A capacitor from this pin to ground sets the time duration for the on board one
shot, which is used for the constant off time architecture.
Fast feedback connection to the PWM comparator. This pin is connected to the
regulator output. The inner feedback loop terminates on time.
Boosted power for the gate driver.
MOSFET driver pin capable of 1.5 A peak switching current.
High current ground for the IC. The MOSFET driver is referenced to this pin. Input
capacitor ground and the anode of the Schottky diode should be tied to this pin.
No connection.
Input power for the IC.
Signal ground for the IC. All control circuits are referenced to this pin.
Error amplifier compensation pin. A capacitor to ground should be provided exter-
nally to compensate the amplifier.
Error amplifier DC feedback input. This is the master voltage feedback which sets
the output voltage. This pin can be connected directly to the output or a remote
sense trace.
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5

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CS5156 arduino
CS5156
(see Figure 14). This circuit operates by pulling the Soft
Start pin high, and the VFFB pin low, emulating a short
circuit condition.
5.0 V
Shutdown
Input
MMUN2111T1 (SOT23)
IN4148
5 SS
CS5156
8 VFFB
Figure 14. Implementing Shutdown with the CS5156
External Power Good Circuit
An optional Power Good signal can be generated through
the use of four additional external components (see Figure
15). The threshold voltage of the Power Good signal can be
adjusted per the following equation:
VPower
Good
+
(R1
)
R2)
R2
0.65 V
This circuit provides an open collector output that drives
the Power Good output to ground for regulator voltages less
than VPower Good.
5.0 V
VOUT
CS5156
R1
10 k
R3
10 k
PN3904
R2
6.2 k
Power Good
PN3904
Figure 15. Implementing Power Good with the CS5156
M 2.50 ms
Trace 3 12 V Input (VCC1) and (VCC2) (10 V/div.)
Trace 45.0 V Input (2.0 V/div.)
Trace 1Regulator Output Voltage (1.0 V/div.)
Trace 2Power Good Signal (2.0 V/div.)
Figure 16. CS5156 Demonstration Board During Power
Up. Power Good Signal is Activated when Output
Voltage Reaches 1.70 V.
Selecting External Components
The CS5156 can be used with a wide range of external
power components to optimize the cost and performance of
a particular design. The following information can be used
as general guidelines to assist in their selection.
NFET Power Transistors
Both logic level and standard MOSFETs can be used. The
reference designs derive gate drive from the 12 V supply
which is generally available in most computer systems and
use logic level MOSFETs. A charge pump may be easily
implemented to support 5.0 V only systems. Multiple
MOSFETs may be paralleled to reduce losses and improve
efficiency and thermal management.
Voltage applied to the MOSFET gates depends on the
application circuit used. The gate driver output is specified
to drive to within 1.5 V of ground when in the low state and
to within 2.0 V of its bias supply when in the high state. In
practice, the MOSFET gates will be driven rail to rail due to
overshoot caused by the capacitive load they present to the
controller IC. For the typical application where VCC1 =
VCC2 = 12 V and 5.0 V is used as the source for the regulator
output current, the following gate drive is provided;
VGATE(H) + 12 V * 5.0 V + 7.0 V
(see Figure 17.)
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