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Número de pieza | SIE812DF | |
Descripción | N-Channel 40-V (D-S) MOSFET | |
Fabricantes | Vishay Siliconix | |
Logotipo | ||
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SPICE Device Model SiE812DF
Vishay Siliconix
N-Channel 40-V (D-S) MOSFET
CHARACTERISTICS
• N-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
Characteristics
DESCRIPTION
The attached spice model describes the typical electrical
characteristics of the n-channel vertical DMOS. The subcircuit
model is extracted and optimized over the −55 to 125°C
temperature ranges under the pulsed 0-V to 10-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.
SUBCIRCUIT MODEL SCHEMATIC
This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Document Number: 74219
S-62042Rev. A, 16-Oct-06
www.vishay.com
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1 page |
Páginas | Total 3 Páginas | |
PDF Descargar | [ Datasheet SIE812DF.PDF ] |
Número de pieza | Descripción | Fabricantes |
SIE812DF | N-Channel 40-V (D-S) MOSFET | Vishay Siliconix |
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