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PDF MPC5565 Data sheet ( Hoja de datos )
| Número de pieza | MPC5565 | |
| Descripción | Microcontroller | |
| Fabricantes | Freescale Semiconductor | |
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Hay una vista previa y un enlace de descarga de MPC5565 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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Freescale Semiconductor
Data Sheet: Product Preview
Document Number: MPC5565
Rev. 0, 06/2006
MPC5565 Microcontroller
Data Sheet
by: Microcontroller Division
This document provides electrical specifications, pin
Contents
assignments, and package diagrams for the MPC5565 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
microcontroller device. For functional characteristics, 2 Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3
refer to the MPC5565 Microcontroller Reference
Manual.
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . 4
3.2 Thermal Characteristics. . . . . . . . . . . . . . . . . . . . . . 5
3.3 Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
1 Overview
3.4 EMI (Electromagnetic Interference) Characteristics 8
3.5 ESD Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 9
3.6 VRC/POR Electrical Specifications . . . . . . . . . . . . . 9
The MPC5565 microcontroller (MCU) is a member of
the MPC5500 family of microcontrollers based on the
3.7 Power Up/Down Sequencing. . . . . . . . . . . . . . . . . 10
3.8 DC Electrical Specifications. . . . . . . . . . . . . . . . . . 12
3.9 Oscillator & FMPLL Electrical Characteristics . . . . 19
PowerPC™ Book E architecture. This family of parts
contains many new features coupled with high
performance CMOS technology to provide substantial
3.10 eQADC Electrical Characteristics . . . . . . . . . . . . . 20
3.11 H7Fa Flash Memory Electrical Characteristics . . . 21
3.12 AC Specifications . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.13 AC Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
reduction of cost per feature and significant performance 4 Mechanicals. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
improvement over the MPC500 family.
4.1 Pinouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
4.2 Package Dimensions. . . . . . . . . . . . . . . . . . . . . . . 45
The host processor core of this device is compatible with
the PowerPC Book E architecture. It is 100% user mode
compatible (with floating point library) with the classic
PowerPC instruction set. The Book E architecture has
enhancements that improve the PowerPC architecture’s
fit in embedded applications. This core also has
additional instructions, including digital signal
processing (DSP) instructions, beyond the classic
5
Revision History. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
This document contains information on a new product. Specifications and information herein
are subject to change without notice.
© Freescale Semiconductor, Inc., 2006. All rights reserved.
• Preliminary—Subject to Change Without Notice
1 page  
Electrical Characteristics
Table 2. Absolute Maximum Ratings1 (continued)
Num
Characteristic
Symbol
Min
Max2
Unit
27 Storage Temperature Range
28 Maximum Solder Temperature 13
29 Moisture Sensitivity Level 14
TSTG
TSDR
MSL
– 55.0
—
—
150.0
260.0
3
oC
oC
1 Functional operating conditions are given in the DC electrical specifications. Absolute maximum ratings are stress ratings only,
and functional operation at the maxima is not guaranteed. Stress beyond the listed maxima may affect device reliability or
cause permanent damage to the device.
2 Absolute maximum voltages are currently maximum burn-in voltages. Absolute maximum specifications for device stress have
not yet been determined.
3 1.5V +/– 10% for proper operation. This parameter is specified at a maximum junction temperature of 150C.
4 All functional non-supply I/O pins are clamped to VSS and VDDE or VDDEH.
5 AC signal over and undershoot of the input voltages of up to +/– 2.0 volts is permitted for a cumulative duration of 60 hours
over the complete lifetime of the device (injection current does not need to be limited for this duration).
6 Internal structures will hold the voltage above –1.0 volt if the injection current limit of 1 mA is met.
7 Internal structures will not clamp to a safe voltage. External protection must be used to ensure that voltage on the pin stays
above –0.3 volts.
8 Internal structures hold the input voltage below this maximum voltage on all pads powered by VDDEH supplies, if the maximum
injection current specification is met (1 mA for all pins) and VDDEH is within Operating Voltage specifications.
9 Internal structures hold the input voltage below this maximum voltage on all pads powered by VDDE supplies, if the maximum
injection current specification is met (1 mA for all pins) and VDDE is within Operating Voltage specifications.
10 Total injection current for all pins (including both digital and analog) must not exceed 25mA.
11 Total injection current for all analog input pins must not exceed 15mA.
12 Lifetime operation at these specification limits is not guaranteed.
13 Solder profile per CDF-AEC-Q100.
14 Moisture sensitivity per JEDEC test method A112.
3.2 Thermal Characteristics
Table 3. Thermal Characteristics
Num
Characteristic
1 Junction to Ambient 1, 2
Natural Convection
(Single layer board)
2 Junction to Ambient 1, 3
Natural Convection
(Four layer board 2s2p)
3 Junction to Ambient 1,3
(@200 ft./min.,
Single layer board)
4 Junction to Ambient 1,3
(@200 ft./min.,
Four layer board 2s2p)
5 Junction to Board 4
(Four layer board 2s2p)
Symbol
RθJA
RθJA
RθJMA
RθJMA
RθJB
Unit
°C/W
Value
324 PBGA
29
°C/W
19
°C/W
23
°C/W
16
°C/W
10
Freescale Semiconductor
MPC5565 Microcontroller Data Sheet, Rev. 0
Preliminary—Subject to Change Without Notice
5
5 Page 
Electrical Characteristics
Although there is no power sequencing required between VRC33 and VDDSYN during power up, for the
VRC stage turn-on to operate within specification, VRC33 must not lead VDDSYN by more than 600 mV
or lag by more than 100 mV. Higher spikes in the emitter current of the pass transistor will occur if VRC33
leads or lags VDDSYN by more than these amounts. The value of that higher spike in current depends on
the board power supply circuitry and the amount of board level capacitance.
Furthermore, when all of the PORs negate, the system clock will start to toggle, adding another large
increase of the current consumption from VRC33. If VRC33 lags VDDSYN by more than 100 mV, this
increased current consumption can drop VDD low enough to assert the 1.5-V POR again. Oscillations are
even possible because when the 1.5-V POR asserts, the system clock stops, causing the voltage on VDD
to rise until the 1.5-V POR negates again. Any oscillations stop when VRC33 is powered sufficiently.
When powering down, VRC33 and VDDSYN do not have a delta requirement to each other, because the
bypass capacitors internal and external to the device are already charged.
When not powering up or down, VRC33 and VDDSYN do not have a delta requirement to each other for
the VRC to operate within specification.
Although there are no power up/down sequencing requirements to prevent issues like latch-up, excessive
current spikes, etc., the state of the I/O pins during power up/down varies depending on power. Table 7
gives the pin state for the sequence cases for all pins with pad type pad_fc (fast type), and Table 8 for all
pins with pad type pad_mh (medium type) and pad_sh (slow type).
VDDE
LOW
VDDE
VDDE
VDDE
VDDEH
LOW
VDDEH
VDDEH
VDD33
X
LOW
VDD33
VDD33
Table 7. Power Sequence Pin States (Fast Pads)
VDD
X
X
LOW
VDD
pad_fc (Fast)
Output Driver
State
Low
High
High Impedance
Functional
Comment
Functional I/O pins are clamped to VSS and VDDE
POR asserted.
No POR asserted
VDD
X
LOW
VDD
Table 8. Power Sequence Pin States (Medium and Slow Pads)
pad_mh/pad_sh
(Medium and Slow)
Output Driver
Low
High Impedance
Functional
Comment
Functional I/O pins are clamped to VSS and VDDEH
POR asserted
No POR asserted
3.7.1 Power Up Sequence (If VRC33 Grounded)
In this case, the 1.5-V VDD supply must rise to 1.35-V before the 3.3-V VDDSYN and the RESET power
supplies rises above 2.0 V. This ensures that digital logic in the PLL on the 1.5-V supply will not begin to
operate below the specified operation range lower limit of 1.35 V. Since the internal 1.5-V POR is disabled,
Freescale Semiconductor
MPC5565 Microcontroller Data Sheet, Rev. 0
Preliminary—Subject to Change Without Notice
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MPC5565.PDF ] | |
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