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PDF MAX5953C Data sheet ( Hoja de datos )
| Número de pieza | MAX5953C | |
| Descripción | (MAX5953x) IEEE 802.3af PD Interface and PWM Controllers | |
| Fabricantes | Maxim Integrated Products | |
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19-3945; Rev 0; 1/06
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
General Description
The MAX5953A/MAX5953B/MAX5953C/MAX5953D
integrate a complete power IC solution for Powered
Devices (PD) in a Power-Over-Ethernet (PoE) system, in
compliance with the IEEE 802.3af standard. The
MAX5953A/MAX5953B/MAX5953C/MAX5953D provide
the PD with a detection signature, a classification sig-
nature, and an integrated isolation switch with program-
mable inrush current control. These devices also
integrate a voltage-mode PWM controller with two
power MOSFETs connected in a two-switch voltage-
clamped DC-DC converter configuration.
An integrated MOSFET provides PD isolation during
detection and classification. All devices guarantee a
leakage current offset of less than 10µA during the
detection phase. A programmable current limit pre-
vents high inrush current during power-on. The devices
feature power-mode undervoltage lockout (UVLO) with
wide hysteresis and long deglitch time to compensate
for twisted-pair-cable resistive drop and to assure
glitch-free transition between detection, classification,
and power-on/-off phases. The MAX5953A/MAX5953C
have an adjustable UVLO threshold with the default
value compliant to the 802.3af standard, while the
MAX5953B/MAX5953D have a lower and fixed UVLO
threshold compatible with some legacy pre-802.3af
power-sourcing equipment (PSE) devices.
The DC-DC converters are operable in either forward or
flyback configurations with a wide input voltage range
from 11V to 76V and up to 15W of output power. The
voltage-clamped power topology enables full recovery
of stored magnetizing and leakage inductive energy for
enhanced efficiency and reliability. When using the
high-side MOSFET, the controller can be configured as
a buck converter. A look-ahead signal for driving sec-
ondary-side synchronous rectifiers can be used to
increase efficiency. A wide array of protection features
include UVLO, over-temperature shutdown, and short-
circuit protection with hiccup current limit for enhanced
performance and reliability. Operation up to 500kHz
allows for smaller external magnetics and capacitors.
The MAX5953A/MAX5953B/MAX5953C/MAX5953D are
available in a high-power (2.22W), 7mm x 7mm ther-
mally enhanced thin QFN package.
Applications
IEEE 802.3af Powered
Devices
IP Phones
Wireless Access Nodes
Internet Appliances
Security Cameras
Computer Telephony
Features
♦ Powered Device Interface
Fully Integrated IEEE 802.3af-Compliant PD
Interface
PD Detection and Programmable Classification
Signatures
Less than 10µA Leakage Current Offset During
Detection
Integrated MOSFET for Isolation and Inrush
Current Limiting
Gate Output Allows External Control of the
Internal Isolation MOSFET
Programmable Inrush Current Control
Programmable Undervoltage Lockout
(MAX5953A/MAX5953C)
♦ DC-DC Converter
Clamped, Two-Switch Power IC for High
Efficiency
Integrated High-Voltage 0.4Ω Power MOSFETs
Up to 15W Output Power
Bias Voltage Regulator with Automatic High-
Voltage Supply Turn-Off
11V to 76V Wide Input Voltage Range
Feed-Forward Voltage-Mode Control for Fast
Input Transient Rejection
Programmable Undervoltage Lockout
Overtemperature Shutdown
Indefinite Short-Circuit Protection with
Programmable Fault Integration
Integrated Look-Ahead Signal for Secondary-
Side Synchronous Rectification
> 90% Efficiency with Synchronous
Rectification
Up to 500kHz Switching Frequency
♦ High-Power (2.22W), 7mm x 7mm Thermally
Enhanced Lead-Free Thin QFN Package
Ordering Information
PART
PIN-PACKAGE
PKG CODE
MAX5953AUTM+*
48 TQFN
T4877-6
MAX5953BUTM+
48 TQFN
T4877-6
MAX5953CUTM+*
48 TQFN
T4877-6
MAX5953DUTM+*
48 TQFN
T4877-6
Operating junction temperature range is 0°C to +125°C.
+Denotes lead-free package.
*Future product—contact factory for availability.
Pin Configuration and Typical Operating Circuit appear at
end of data sheet.
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
www.DataSheet4U.com
IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
ELECTRICAL CHARACTERISTICS (DC-DC Controller) (continued)
(All voltages referenced to GND, unless otherwise noted. VHVIN = +48V, CINBIAS = 1µF, CREGOUT = 2.2µF, RRTCT = 25kΩ, CRTCT =
100pF, CBST = 0.22µF, VCSS = VCS = 0V, VRAMP = VDCUVLO = 3V, TJ = 0°C to +125°C, unless otherwise noted. Typical values are at
TJ = +25°C, unless otherwise noted.) (Note 1)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
SOFT-START (CSS)
Soft-Start Current
ICSS
INTEGRATING FAULT PROTECTION
VCSS = 0V
33 µA
FLTINT Source Current
FLTINT Trip Point
FLTINT Hysteresis
IFLTINT
VFLTINT rising
80 µA
2.7 V
0.75 V
INTERNAL POWER FETs
On-Resistance
Off-State Leakage Current
RON,POWER
VDRVIN = VBST = 9V,
VXFRMRH = VSRC = 0V, IDS = 50mA
0.4 0.8
Ω
-5 +10 µA
Total Gate Charge Per Power
FET
HIGH-SIDE DRIVER
15 nC
Low to High Latency
tLH-HS
Driver delay until FET VGS reaches 0.9 x
(VBST - VXFRMRH) and is fully on
80
ns
High to Low Latency
tHL-HS
Driver delay until FET VGS reaches 0.1 x
(VBST - VXFRMRH) and is fully off
40
ns
Output Drive Voltage
VBST
BST to XFRMRH with high side on
8V
LOW-SIDE DRIVER
Low to High Latency
tLH-LS
Driver delay until FET VGS reaches 0.9 x
VDRVIN and is fully on
80
ns
High to Low Latency
tHL-LS
Driver delay until FET VGS reaches 0.1 x
VDRVIN and is fully off
40
ns
CURRENT-LIMIT COMPARATOR (CS)
Current-Limit Threshold
Voltage
VILIM
140 156 172
mV
Current-Limit Input Bias
Current
IBILIM
0 < VCS < 0.3V
-2 +2 µA
Propagation Delay to XFRMRL
tdILIM
From VCS rising (10mV overdrive) to
VXFRMRL rising
BOOST VOLTAGE CIRCUIT (See Figure 9, QB)
Driver Output Delay
tPPWMD
One-Shot Pulse Width
tPWQB
QB RDSON
Sinking 20mA
THERMAL SHUTDOWN
Shutdown Temperature
Thermal Hysteresis
TSH Temperature rising
TH
160 ns
200
300
30 60
+160
20
ns
ns
Ω
°C
°C
_______________________________________________________________________________________ 5
5 Page 
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IEEE 802.3af PD Interface and PWM Controllers
with Integrated Power MOSFETs
PIN
25
26, 27
28, 29
30
31, 32
33, 34
36
37
39
40
41
42
43
44
45
—
Pin Description (continued)
NAME
OPTO
FUNCTION
PWM Comparator Inverting Input. OPTO is referenced to GND. Connect the collector of the
optotransistor to OPTO and a pullup resistor to REGOUT.
SRC
Source Connection of Low-Side Power MOSFET in the Two-Switch Power Stage of the DC-
DC Converter. Connect SRC to PGND with a low-value resistor for current limiting.
XFRMRL Low-Side Connection for the Isolation Transformer. Drain terminal of low-side power
MOSFET in the two-switch power stage of the DC-DC converter.
DRVIN Supply Input for the Gate-Driver of Internal Power MOSFETs. DRVIN is referenced to
PGND. Bypass DRVIN with at least 0.1µF to PGND. Connect DRVIN to REGOUT.
XFRMRH
High-Side Connection for the Isolation Transformer. Source connection of high-side power
MOSFET in the two-switch power stage of the DC-DC converter.
DRNH
Drain Connection of High-Side MOSFET in the Two-Switch Power Stage of the DC-DC
Converter. Connect DRNH to the most positive rail of the input supply. Bypass DRNH
appropriately to handle the heavy switching current through the transformer.
Boost Input for the DC-DC Converter. BST is the boost connection point for the high-side
BST MOSFET driver. Connect a minimum 0.1µF capacitor from BST to XFRMRH with short and
wide PC board traces.
DCUVLO DC-DC Converter Undervoltage Lockout Input. DCUVLO is referenced to GND. Connect a
resistor-divider from HVIN to DCUVLO to GND to set the UVLO threshold.
HVIN DC-DC Converter Positive Input Power Supply. HVIN is referenced to GND. Connect HVIN
to V+.
INBIAS Input from the Rectified Bias Winding to the DC-DC Converter. INBIAS is referenced to
GND. INBIAS is the input to the internal linear voltage regulator (REGOUT).
REGOUT
Internal Regulator Output. REGOUT is used for the DC-DC converter gate driver. REGOUT
is referenced to GND. VREGOUT is always present as long as HVIN is powered with a
voltage above the DCUVLO threshold. Bypass REGOUT to GND with a minimum 2.2µF
ceramic capacitor.
RTCT
Oscillator Frequency Set Input for the PWM Controller. RTCT is referenced to GND.
Connect a resistor from RTCT to REGOUT and a ceramic capacitor from RTCT to GND to
set the oscillator frequency.
FLTINT
Fault Integration Input for PWM Controller. FLTINT is referenced to GND. During persistent
current-limit faults, a capacitor connected to FLTINT is charged with an internal 80µA
current source. Switching is terminated when VFLTINT reaches 2.7V. An external resistor
connected in parallel discharges the capacitor. Switching resumes when VFLTINT drops
to 1.9V.
RCFF
RAMP
EP
Feed-Forward Input for PWM Controller. RCFF is referenced to GND. To generate the PWM
ramp, connect a resistor from RCFF to HVIN and a capacitor from RCFF to GND.
Ramp Sense Input for PWM Controller. Connect RAMP to RCFF.
Exposed Paddle. EP is internally unconnected and must be connected to VEE externally.
To improve power dissipation, solder the exposed paddle to a copper pad on the PC
board.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 27 Páginas | |
| PDF Descargar | [ Datasheet MAX5953C.PDF ] | |
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