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PDF CS44130 Data sheet ( Hoja de datos )
| Número de pieza | CS44130 | |
| Descripción | 60 W Quad Half-Bridge Digital Amplifier Power Stage | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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CS44130
60 W Quad Half-Bridge Digital Amplifier Power Stage
Features
Configurable Outputs (10% THD+N)
– 2 x 30 W into 8 Ω, Full-Bridge
– 1 x 60 W into 4 Ω, Parallel Full-Bridge
– 4 x 15 W into 4 Ω, Half-Bridge
– 2 x 15 W into 4 Ω, Half-Bridge + 1 x 30 W
into 8 Ω, Full-Bridge
Space-Efficient, Thermally-Enhanced QFN
Package
PWM Popguard® Technology for Quiet Startup
> 100 dB Dynamic Range - System Level
< 0.12% THD+N @ 1 W - System Level
Built-In Protection with Error Reporting
– Over-Current
– Thermal Warning
– Thermal Fault
– Under-Voltage
Single (+10.8 V to +21 V) High Voltage Supply
High Efficiency (90%)
Low RDS(ON)
Low Quiescent Current
Low Power Standby Mode
Common Applications
Digital Televisions
MP3 Docking Stations
Mini Shelf Systems
Networked Audio/POE Systems
Desktop Speakers
General Description provided on page 2.
VD
VL
IN[4:1]
GND
Level Shifters
Non-Overlap
Time Insertion
Gate
Drivers
VP
OUT[4:1]
PGND
Control Logic
Protection and Error Reporting
(Open Drain with Internal Pull-ups)
M[3:1] OCREF LVD RAMP RST1/2 RST3/4 ERROC1/2 ERROC3/4 ERRUVTE TWR
Preliminary Product Information
This document contains information for a new product.
Cirrus Logic reserves the right to modify this product without notice.
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2006
(All Rights Reserved)
JULY '06
DS690PP1
1 page  
CS44130
Pin Name
VD
VL
GND
OUT1
OUT2
OUT3
OUT4
IN1
IN2
IN3
IN4
RST1/2
RST3/4
ERROC1/2
ERROC3/4
ERRUVTE
TWR
LVD
M1
M2
M3
OCREF
RAMP
Pin #
Pin Description
20, 25
28, 32 Core Logic Power (Input) - Low voltage power supply for internal logic.
35
37 Control Interface and PWM Input Power (Input) - Supply for the I/O.
21
27 Ground (Input) - Ground for the internal logic and I/O. These pins should be connected to the
33 common system ground.
36
2
5
8
PWM Output (Output) - Amplified PWM power half-bridge outputs.
11
34
31
29
PWM Input (Input) - Inputs from a PWM modulator. These pins should not be left floating.
26
42 Reset Input (Input) - Reset inputs for channel 1, 2, 3, and 4; active low. These pins should not be
23 left floating.
41 Over-Current Error Output (Output) - Over-current error flag for OUTx. Open drain with internal
22 pull-up, active low. See Protection and Error Reporting on page 18 for details.
Thermal and Under-Voltage Error Output (Output) - Error flag for thermal shutdown and under-
18 voltage. Open drain with internal pull-up, active low. See Protection and Error Reporting on
page 18 for details.
17
Thermal Warning Output (Output) - Thermal warning output. Open drain with internal pull-up,
active low. See Protection and Error Reporting on page 18 for details.
30
Input Voltage Level Select (Output) - Input voltage indicator of VD. A high level indicates VD is
set to 5.0 V. A low level indicates VD is set to 3.3 V. This pins should not be left floating.
40
39
38
Mode Select (Input) - Used to set the operating mode. See Output Mode Configuration on
page 15 for details. These pins should not be left floating.
Over-Current Reference (Input) - Over-current trip level setting. This pin should be connected
19 through a 60 kΩ resistor to GND. See Protection and Error Reporting on page 18 for details.
This pins should not be left floating.
Ramp-Up/Down Select (Input) - When set high, ramping is enabled. When set low, ramping is
24
disabled. See PWM Popguard Transient Control on page 19 for details. This pin should not
be left floating. Ramp should only be used in half bridge mode or in full bridge configuration
modes 010 and 011.
DS690PP1
5
5 Page 
CS44130
VD (+3.3 V or +5.0 V)
47 µF
0.1 µF (X5)
VP (+10.8 V to +21 V)
0.1 µF
0.1 µF
VL (+2.5 V, +3.3 V, or +5.0 V)
VL
VD VD VD VD VD VP
VP
PWM1+
PWM2+
PWM3+
PWM4+
Hardware
Control
Settings
IN1
IN2
IN3
IN4
M1
M2
M3
LVD
RAMP
CS44130
OUT1
PGND
VP
OUT2
PGND
VP
VP
0.1 µF 470 µF
Output
Filter
VP
0.1 µF 470 µF
Output
Filter
VP
0.1 µF
System
Control
Logic
60K
RST1/2
RST3/4
ERROC1/2
ERROC3/4
ERRUVTE
TWR
OCREF
OUT3
PGND
VP
OUT4
PGND
Output
Filter
0.1 µF 470 µF
Output
Filter
GND GND GND GND GND
Figure 2. Typical Connection Diagram - 2.1 Channels (2 x Half-Bridge + 1 x Full-Bridge)
DS690PP1
11
11 Page | ||
| Páginas | Total 23 Páginas | |
| PDF Descargar | [ Datasheet CS44130.PDF ] | |
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