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PDF NJW1144 Data sheet ( Hoja de datos )
| Número de pieza | NJW1144 | |
| Descripción | AUDIO PROCESSOR | |
| Fabricantes | New Japan Radio | |
| Logotipo |  |
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NJW1144
AUDIO PROCESSOR
s GENERAL DESCRIPTION
s PACKAGE OUTLINE
The NJW1144 is a sound processor includes all of the
functions required to process the audio signal for TV, such
as tone control, balance, volume, mute, and AGC functions.
Also the NJW1144 performs BBE sound enhancement
and SRS 3D Stereo. The BBE regenerates high definitive
and nearly real sound, and SRS 3D Stereo regenerates 3D
surround sound with only two speakers.
All of the internal status and variables are controlled by
I2C BUS interface.
NJW1144GK1
s FEATURES
qOperating Voltage
8 to 13V
q I2C BUS Interface
q BBE Sound Enhancement (Low Boost and High Boost: 15dB max.)
q Internal 6 Input Audio Selectors and Monitor Output
q The AGC circuit reduces volume difference among input sources.
q Variable AGC Compression Level via I2C (4-levels)
q SRS 3D Stereo and Simulated Stereo
q Variable Surround Effect Level via I2C
q Low Noise VCA
q Bi-CMOS Technology
q Package Outline
SOP40-K1
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sBLOCK DIAGRAM
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IN1a
IN2a
IN3a
IN4a
IN5a
IN6a
IN1b
IN2b
IN3b
IN4b
IN5b
IN6b
MONa AGC
SEL VOL1
AGC
SEL VOL1
M ONb
SRS
3D Stereo
&
Sim ulated
Stere o
TONE TONE
-Ha -La
OUTa
BBE
TONE
VOL2
BBE
TONE
VOL2
I2C BUS
Interface
SDA
SCL
CVA
CVB
CTH
CTL
CSR
CSB
Bias
GND
V cc
TONE TONE
-Hb -Lb
OUTb
Vref
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NJW1144
s ELECTRICAL CHARACTERISTICS ( Ta=25°C, V+=9V, Rg=600Ω, RL=47kΩ, Vin=100mVrms)
q SIMULATED SURROUND (Simulated Surround-ON, f=1kHz)
PARAMETER
SYMBOL
TEST CONDITION
MIN. TYP. MAX.
SURROUND SIM A
SURROUND SIM B
SRSIMA
SRSIMB
Ain+Bin → Aout
Ain+Bin → Bout
1.0 3.0 5.0
1.0 3.0 5.0
UNIT
dB
dB
q SRS 3D-Stereo (SRS 3D Stereo-ON, f=125Hz)
PARAMETER
SYMBOL
TEST CONDITION
SRS GAIN HIGH 1
SRS GAIN HIGH 2
SRS GAIN LOW 1
SRS GAIN LOW 2
SRS GAIN HIGH 3
SRS GAIN HIGH 4
SRSGH1
SRSGH2
SRSGL1
SRSGL2
SRSGH3
SRSGH4
Ain → Aout, Mode=High
Bin → Bout, Mode=High
Ain → Aout, Mode=Low
Bin → Bout, Mode=Low
Bin → Aout, Mode=High
Ain → Bout, Mode=High
MIN.
10.0
10.0
7.0
7.0
6.8
6.8
TYP.
12.0
12.0
9.0
9.0
8.8
8.8
MAX.
14.0
14.0
11.0
11.0
10.8
10.8
UNIT
dB
dB
dB
dB
dB
dB
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NJW1144
s DEFINITION OF I2C REGISTER
q I2C BUS FORMAT
MSB
LSB
MSB
LSB MSB
S Slave Address A Select Address A
1bit 8bit 1bit 8bit 1bit
Data
8bit
LSB
A
P
1bit 1bit
S: Starting Term
A: Acknowledge Bit
P: Ending Term
q SLAVE ADDRESS
MSB
LSB
1 0 0 0 0 0 1 R/W
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R/W=0: Write mode for register setting
R/W=1: Not available
q CONTROL REGISTER TABLE
Select
Address
00H
01H
02H
03H
04H
05H
D7
CHS
BCB
BCT
OUT
BIT
D6 D5 D4 D3
VOL
BAL
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BASS
TREB
BBE-Low
SEL AGC1
q CONTROL REGISTER DEFAULT VALUE
Select
Address
D7
D6
D5
00H 0 0 0
01H 0 0 0
02H 0 0 0
03H 0 0 0
04H 0 0 0
05H 0 0 0
BIT
D4 D3
00
00
00
00
00
00
D2 D1 D0
SR1 SR0
BCSB
SUB-BASS
BCST
SUB-TREB
BBE-High
AGC0
AGC
BBE
D2 D1 D0
000
000
000
000
000
000
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| Páginas | Total 24 Páginas | |
| PDF Descargar | [ Datasheet NJW1144.PDF ] | |
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