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Número de pieza | UPD780232 | |
Descripción | 8-bit Single-Chip Microcontroller | |
Fabricantes | NEC | |
Logotipo | ||
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No Preview Available ! DATA SHEET
MOS INTEGRATED CIRCUIT
µPD780232
8-BIT SINGLE-CHIP MICROCONTROLLER
DESCRIPTION
The µPD780232 is a member of the µPD780232 Subseries in the 78K/0 Series.
The µPD780232 Subseries consists of products that incorporate a VFD controller/driver for panel control.
A flash memory version, the µPD78F0233, that can operate within the same power supply voltage range as the
mask ROM version, and various development tools are also under development.
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before
designing.
µPD780232 Subseries User’s Manual:
U13364E
78K/0 Series User’s Manual Instructions: U12326E
FEATURES
• I/O ports: 40
• Internal ROM and RAM
• Internal ROM:
16 KB
• Internal high-speed RAM: 768 bytes
• Internal buffer RAM:
32 bytes
• VFD display RAM:
112 bytes
• Minimum instruction execution time can be changed
from high speed (0.4 µs) to low speed (6.4 µs)
• VFD controller/driver: 53 display outputs
(Universal grid supported)
• 8-bit resolution A/D converter: 4 channels
• Serial interface: 2 channels
• Timer: 4 channels
• Power supply voltage: VDD = 4.5 to 5.5 V
APPLICATIONS
Monolithic mini components, separated mini components, tuners, cassette tape decks, CD/MD players, audio
amplifiers, etc.
ORDERING INFORMATION
Part Number
µPD780232GC-×××-8BT
Package
80-pin plastic QFP (14 × 14)
Remark ××× indicates ROM code suffix.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. U13415EJ2V0DS00 (2nd edition)
Date Published May 2001 N CP(K)
Printed in Japan
The mark shows major revised points.
©
12909080
1 page µPD780232
CONTENTS
1. PIN CONFIGURATION (TOP VIEW) ................................................................................................. 6
2. BLOCK DIAGRAM ............................................................................................................................. 8
3. PIN FUNCTIONS ................................................................................................................................ 9
3.1 Port Pins ..................................................................................................................................................... 9
3.2 Non-Port Pins .......................................................................................................................................... 10
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins ................................................... 11
4. MEMORY SPACE ............................................................................................................................. 13
5. PERIPHERAL HARDWARE FUNCTION FEATURES ................................................................... 14
5.1 Port ............................................................................................................................................................ 14
5.2 Clock Generator ...................................................................................................................................... 15
5.3 Timer/Event Counter ............................................................................................................................... 15
5.4 A/D Converter .......................................................................................................................................... 18
5.5 Serial Interface ........................................................................................................................................ 18
5.6 VFD Controller/Driver ............................................................................................................................. 19
6. INTERRUPT FUNCTIONS ............................................................................................................... 21
7. STANDBY FUNCTION ..................................................................................................................... 24
8. RESET FUNCTION ........................................................................................................................... 24
9. MASK OPTION ................................................................................................................................. 24
10. INSTRUCTION SET .......................................................................................................................... 25
11. ELECTRICAL SPECIFICATIONS .................................................................................................... 28
12. PACKAGE DRAWING ...................................................................................................................... 42
13. RECOMMENDED SOLDERING CONDITIONS .............................................................................. 43
APPENDIX A. DEVELOPMENT TOOLS ............................................................................................... 44
APPENDIX B. RELATED DOCUMENTS .............................................................................................. 47
Data Sheet U13415EJ2V0DS
5
5 Page µPD780232
3.3 Pin I/O Circuits and Recommended Connection of Unused Pins
The I/O circuit type of each pin and the recommended connection of unused pins are shown in Table 3-1.
For the I/O circuit configuration of each type, see Figure 3-1.
Table 3-1. Types of Pin I/O Circuits
Pin Name
P00/INTP0
P01/INTP1
P02/TI
P20/SCK3
P21/SO3
P22, P23
P24/BUSY
P25/SO1
P26/SI1
P27/SCK1
P30/FIP24 to P37/FIP31
P40/FIP32 to P47/FIP39
P50/FIP40 to P57/FIP47
P60/FIP48 to P64/FIP52
FIP0 to FIP23
RESET
ANI0 to ANI3
AVDD
AVSS
VLOAD
IC
I/O Circuit Type
I/O
8-C I/O
14-F
15-D
14-F
2
7
—
Output
I/O
Output
Input
—
Recommended Connection of Unused Pins
Input: Independently connect to VSS0 via a resistor.
Output: Leave open.
Input: Independently connect to VDD0 or VSS0 via a resistor.
Output: Leave open.
Leave open.
Input: Independently connect to VDD0 or VSS0 via a resistor.
Output: Leave open.
Leave open.
—
Connect to VDD0 or VSS0.
Connect to VDD1.
Connect to VSS1.
Connect directly to VSS1.
Data Sheet U13415EJ2V0DS
11
11 Page |
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