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PDF MC14515 Data sheet ( Hoja de datos )
| Número de pieza | MC14515 | |
| Descripción | 4-Bit Transparent Latch/4-to-16 Line Decoder | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de MC14515 (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
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MC14514B, MC14515B
4-Bit Transparent
Latch/4-to-16 Line Decoder
The MC14514B and MC14515B are two output options of a 4 to 16
line decoder with latched inputs. The MC14514B (output active high
option) presents a logical “1” at the selected output, whereas the
MC14515B (output active low option) presents a logical “0” at the
selected output. The latches are R–S type flip–flops which hold the
last input data presented prior to the strobe transition from “1” to “0”.
These high and low options of a 4–bit latch/4 to 16 line decoder are
constructed with N–channel and P–channel enhancement mode
devices in a single monolithic structure. The latches are R–S type
flip–flops and data is admitted upon a signal incident at the strobe
input, decoded, and presented at the output.
These complementary circuits find primary use in decoding
applications where low power dissipation and/or high noise immunity
is desired.
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
http://onsemi.com
MARKING
24 DIAGRAMS
PDIP–24
P SUFFIX
CASE 709
MC145XXBCP
AWLYYWW
1
MAXIMUM RATINGS (Voltages Referenced to VSS) (Note 1.)
Symbol
Parameter
Value
VDD
Vin, Vout
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
– 0.5 to +18.0
– 0.5 to VDD + 0.5
Iin, Iout
Input or Output Current
(DC or Transient) per Pin
± 10
Unit
V
V
mA
PD Power Dissipation,
per Package (Note 2.)
500 mW
TA Ambient Temperature Range
Tstg Storage Temperature Range
TL Lead Temperature
(8–Second Soldering)
– 55 to +125
– 65 to +150
260
°C
°C
°C
1. Maximum Ratings are those values beyond which damage to the device
may occur.
2. Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
This device contains protection circuitry to guard against damage due to high
static voltages or electric fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated voltages to this
v vhigh–impedance circuit. For proper operation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an appropriate logic voltage level (e.g.,
either VSS or VDD). Unused outputs must be left open.
24
SOIC–24
DW SUFFIX
CASE 751E
1
145XXB
AWLYYWW
XX = Specific Device Code
A = Assembly Location
WL or L = Wafer Lot
YY or Y = Year
WW or W = Work Week
ORDERING INFORMATION
Device
Package
Shipping
MC14514BCP
PDIP–24
15/Rail
MC14514BDW
SOIC–24
30/Rail
MC14514BDWR2 SOIC–24 1000/Tape & Reel
MC14515BCP
PDIP–24
15/Rail
MC14515BDW
SOIC–24
30/Rail
MC14515BDWR2 SOIC–24 1000/Tape & Reel
© Semiconductor Components Industries, LLC, 2000
March, 2000 – Rev. 3
1
Publication Order Number:
MC14514B/D
1 page  
PULSE
GENERATOR
MC14514B, MC14515B
VDD
ID
500
µF
24 VDD
D1 S0
D2
D3
D4
STROBE
INHIBIT S15
12 VSS
0.01 µF
CERAMIC
CL
CL
20 ns
90%
Vin
10%
20 ns
VDD
VSS
PROGRAMMABLE
PULSE
GENERATOR
Figure 2. Dynamic Power Dissipation Test Circuit and Waveform
VDD
STROBE
INHIBIT
S0
S1
D1
CL
D2
D3
D4 S15
VSS
OUTPUT S0
OUTPUT S1
CL
tTLH
20 ns
INPUT
10%
90%
50%
tPLH
OUTPUT
90%
50%
10%
OUTPUT S15
CL
tTLH
tTHL
VDD
VSS
tPHL
VDD
VSS
tTHL
Figure 3. Switching Time Test Circuit and Waveforms
http://onsemi.com
5
5 Page 
Notes
MC14514B, MC14515B
http://onsemi.com
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet MC14515.PDF ] | |
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