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PDF MC14516B Data sheet ( Hoja de datos )
| Número de pieza | MC14516B | |
| Descripción | Binary Up/Down Counter | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC14516B
Binary Up/Down Counter
The MC14516B synchronous up/down binary counter is
constructed with MOS P−channel and N−channel enhancement mode
devices in a monolithic structure.
This counter can be preset by applying the desired value, in binary,
to the Preset inputs (P0, P1, P2, P3) and then bringing the Preset
Enable (PE) high. The direction of counting is controlled by applying
a high (for up counting) or a low (for down counting) to the
UP/DOWN input. The state of the counter changes on the positive
transition of the clock input.
Cascading can be accomplished by connecting the Carry Out to the
Carry In of the next stage while clocking each counter in parallel. The
outputs (Q0, Q1, Q2, Q3) can be reset to a low state by applying a high
to the reset (R) pin.
This CMOS counter finds primary use in up/down and difference
counting. Other applications include: (1) Frequency synthesizer
applications where low power dissipation and/or high noise immunity
is desired, (2) Analog−to−Digital and Digital−to−Analog conversions,
and (3) Magnitude and sign generation.
Features
• Diode Protection on All Inputs
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Internally Synchronous for High Speed
• Logic Edge−Clocked Design — Count Occurs on Positive Going
Edge of Clock
• Single Pin Reset
• Asynchronous Preset Enable Operation
• Capable of Driving Two Low−Power TTL Loads or One
Low−Power Schottky Load Over the Rated Temperature Range
• These Devices are Pb−Free and are RoHS Compliant
• NLV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100
Qualified and PPAP Capable
MAXIMUM RATINGS (Voltages Referenced to VSS)
Parameter
Symbol
Value
Unit
DC Supply Voltage Range
Input or Output Voltage Range
(DC or Transient)
VDD
Vin, Vout
−0.5 to +18.0
− 0.5 to VDD
+ 0.5
V
V
Input or Output Current (DC or Transient) Iin, Iout ± 10 mA
per Pin
Power Dissipation, per Package (Note 1)
PD
500 mW
Ambient Temperature Range
TA −55 to +125 °C
Storage Temperature Range
Tstg − 65 to +150 °C
Lead Temperature (8−Second Soldering)
TL
260 °C
Stresses exceeding Maximum Ratings may damage the device. Maximum
Ratings are stress ratings only. Functional operation above the Recommended
Operating Conditions is not implied. Extended exposure to stresses above the
Recommended Operating Conditions may affect device reliability.
1. Temperature Derating: Plastic “DW” Packages:
– 7.0 mW/_C From 65_C To 125_C
© Semiconductor Components Industries, LLC, 2014
March, 2014 − Rev. 10
1
http://onsemi.com
MARKING
DIAGRAM
SOIC−16 16
D SUFFIX
14516BG
AWLYWW
CASE 751B
1
1
A = Assembly Location
WL = Wafer Lot
Y = Year
WW = Work Week
G = Pb−Free Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 2 of this data sheet.
This device contains protection circuitry to guard
against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid
applications of any voltage higher than maximum rated
voltages to this high−impedance circuit. For proper
operation, Vin and Vout should be constrained to the
range VSS v (Vin or Vout) v VDD.
Unused inputs must always be tied to an appropriate
logic voltage level (e.g., either VSS or VDD). Unused
outputs must be left open.
Publication Order Number:
MC14516B/D
1 page  
500 pF
VDD
ID
PULSE
GENERATOR
PE Q0
CARRY IN
R Q1
UP/DOWN
CLOCK Q2
P0
P1 Q3
P2
CARRY
P3 OUT
CL
MC14516B
0.01 mF
CERAMIC
CL
CL
CL
CL
20 ns
CLOCK
90%
50%
VARIABLE
WIDTH
20 ns
VDD
10% VSS
Figure 1. Power Dissipation Test Circuit and Waveform
RESET 9
PRESET 1
ENABLE
CLOCK 15
CARRY OUT 7
LOGIC DIAGRAM
P0 Q0
46
P1 Q1
12 11
P2 Q2
13 14
P3 Q3
32
PE P Q
C
TQ
PE P Q
C
TQ
PE P Q
C
TQ
PE P Q
C
TQ
CARRY IN 5
UP/DOWN 10
http://onsemi.com
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| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet MC14516B.PDF ] | |
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