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Número de pieza | LM3485 | |
Descripción | Hysteretic PFET Buck Controller | |
Fabricantes | National Semiconductor | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de LM3485 (archivo pdf) en la parte inferior de esta página. Total 15 Páginas | ||
No Preview Available ! May 2002
LM3485
Hysteretic PFET Buck Controller
General Description
The LM3485 is a high efficiency PFET switching regulator
controller that a system designer can use to quickly and
easily develop a small, low cost, switching buck regulator for
a wide range of applications. The use of a hysteretic control
scheme provides for simple design without any control loop
stability concerns using a wide variety of external compo-
nents. The PFET architecture also allows for low component
count as well as ultra-low dropout operation. Another benefit
is high efficiency operation at light loads without an increase
in output ripple. Current limit protection circuit is provided by
measuring the voltage across the PFET’s RDSON thus elimi-
nating a costly sense resistor. The current limit can be ad-
justed allowing for designs at various output currents and
costs.
Features
n Easy to use control methodology
n No control loop compensation required
n 4.5V to 35V wide input range
n 1.242V to VIN adjustable output range
n High Efficiency 93%
n ±1.3% (±2% over temp) internal reference
n 100% duty cycle
n Maximum operating frequency > 1MHz
n Current limit protection
n MSOP-8
Applications
n Set-Top Box
n DSL/Cable Modem
n PC/IA
n Auto PC
n TFT Monitor
n Battery Powered Portable Applications
n Distributed Power Systems
n Always On Power
Typical Application Circuit
20034608
© 2002 National Semiconductor Corporation DS200346
www.national.com
1 page Typical Performance Characteristics Unless otherwise specified, TJ = 25˚C
Quiescent Current vs Input Voltage
(FB = 1.5V)
Feedback Voltage vs Temperature
20034601
Hysteresis Voltage vs Input Voltage
20034607
Hysteresis Voltage vs Temperature
20034605
Current Limit ADJ Current vs Temperature
20034606
Current Limit One Shot OFF Time vs. Temperature
20034602
5
20034604
www.national.com
5 Page Functional Description (Continued)
Start Up
The current limit circuit is active during start-up. During
start-up the PFET will stay on until either the current limit or
the feedback comparator is tripped
If the current limit comparator is tripped first then the fold
back characteristic should be taken into account. Start-up
into full load may require a higher current limit set point or the
load must be applied after start-up.
One problem with selecting a higher current limit is inrush
current during start-up. Adding a capacitance (CADJ) in par-
allel with RADJ results in soft-start. CADJ and RADJ create an
RC time constant forcing current limit to activate at a lower
current. The output voltage will ramp more slowly when
using the soft-start functionality.
The CADJ also filters unwanted noise so that the ISENSE
comparator will not be accidentally triggered. A value of
100pF to 1nF is recommended in most applications. These
low values for CADJ will have little to no effect on soft-start.
There are example start-up plots for CADJ equal to 1nF and
10nF in the Typical Performance Characteristics.
External Sense Resistor
The VDS of a PFET will tend to vary significantly over tem-
perature. This will result an equivalent variation in current
limit. To improve current limit accuracy an external sense
resistor can be connected from VIN to the source of the
PFET, as shown in Figure 5.
20034627
FIGURE 5. Current Sensing by External Resistor
11 www.national.com
11 Page |
Páginas | Total 15 Páginas | |
PDF Descargar | [ Datasheet LM3485.PDF ] |
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