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PDF SP8025 Data sheet ( Hoja de datos )

Número de pieza SP8025
Descripción 200V/us Integrated APC Amplifier with Gain Adjust & Differential Output
Fabricantes Sipex 
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No Preview Available ! SP8025 Hoja de datos, Descripción, Manual

® Advanced SP8024/8025/8026
200V/µs Integrated APC Amplifier
with Gain Adjust & Differential Output
FEATURES
Slew Rate of 200V/µs
Fast Settling Time - 10ns
Gain Switch
2V Output Swing
Low Offset Voltage: < 10mV
Low Offset Drift: < 20µV/°C
12dB External Gain Adjust Range
VCC
1
8
SP8024/25/26
GAIN 2
7
RCOM 3
8 Pin COB
6
GND 4
5
VOUT +
VOUT -
RGAIN2
RGAIN1
DESCRIPTION
The SP8024, SP8025, and SP8026 are high-speed, differential output APC amplifiers that
integrate the photodiode and adjustable gain block on one chip. This allows the user to control
the laser power of the system in high-speed DVDRW, DVDRAM and CDRW systems. The wide
2V output swing also allows better system performance.
FUNCTIONAL DIAGRAM
VCC
GND
2463
TIA
2463
GAIN
Buffer
31 850
Rf1
31 Rf2
850
Buffer
VOUT+
1VP-P
50pF 1k
(Flexible Flat Cable)
VOUT-
1VP-P
50pF 1k
Rev. 6/02/03
RGCOM
RG1
RGAIN1
RG2
RGAIN2
SP8024, 25, 26 200V/µs Integrated APC Amplifier
1
© Copyright 2003 Sipex Corporation

1 page




SP8025 pdf
Layout and Routing Considerations
Special care must be taken when designing the
Flex or PCB for this part. The output peak
current requirement is in the order of 12.5mA
when driving 50pF of capacitive load with a
slew rate of 200V/s Therefore care must be
taken to provide low inductance, low resistance
paths for power and ground and output traces.
Supply coupling is also very important. Good
supply decoupling is important to ensure the
high frequency performance of the system by
eliminating supply lead inductance effects. The
decoupling capacitor C1 should be as close to
the part as possible. This capacitor should be
0.1µF ceramic. C2 is optional to improve
decoupling and is recommended to be 1µF tan-
talum. The layout of the PCB is pictured here.
Note the wide and short traces on the supply
lines.
The traces for the gain resistors R1 and R2 are
kept as short as possible to avoid excessive
parasitics. Any parasitics on these nodes will
limit the performance of the system. R1 and R2
are subminiature potentiometers in the applica-
tion. This is a single layer board done on FR4
material.
In order to minimize coupling capacitance into
the gain setting resistor nodes, it is also critical
that VOUT+ and VOUT- are routed away from the
traces associated with the gain-setting resistors.
Top
Figure 2. Test and Evaluation PCB Layout for COB 8 Lead Package
Bottom
Rev. 6/02/03
SP8024, 25, 26 200V/µs Integrated APC Amplifier
5
© Copyright 2003 Sipex Corporation

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