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PDF PSMN004-55W Data sheet ( Hoja de datos )
| Número de pieza | PSMN004-55W | |
| Descripción | N-channel logic level TrenchMOS transistor | |
| Fabricantes | Philips | |
| Logotipo |  |
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Philips Semiconductors
Product specification
N-channel logic level TrenchMOS™ transistor
PSMN004-55W
FEATURES
• ’Trench’ technology
• Very low on-state resistance
• Fast switching
• Low thermal resistance
• Logic level compatible
SYMBOL
d
g
s
QUICK REFERENCE DATA
VDSS = 55 V
ID = 100 A
RDS(ON) ≤ 4.2 mΩ (VGS = 10 V)
RDS(ON) ≤ 4.5 mΩ (VGS = 5 V)
RDS(ON) ≤ 5 mΩ (VGS = 4.5 V)
GENERAL DESCRIPTION
SiliconMAX products use the latest
Philips Trench technology to
achieve the lowest possible
on-state resistance in each
package at each voltage rating.
Applications:-
• d.c. to d.c. converters
• switched mode power supplies
The PSMN004-55W is supplied in
the SOT429 (TO247) conventional
leaded package.
PINNING
PIN
DESCRIPTION
1 gate
2 drain
3 source
tab drain
SOT429 (TO247)
1 23
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
VDSS
VDGR
VGS
VGSM
ID
IDM
PD
Tj, Tstg
Drain-source voltage
Drain-gate voltage
Continuous gate-source
voltage
Peak pulsed gate-source
voltage
Continuous drain current
Pulsed drain current
Total power dissipation
Operating junction and
storage temperature
Tj = 25 ˚C to 175˚C
Tj = 25 ˚C to 175˚C; RGS = 20 kΩ
Tj ≤ 150 ˚C
Tmb = 25 ˚C; VGS = 5 V
Tmb = 100 ˚C; VGS = 5 V
Tmb = 25 ˚C
Tmb = 25 ˚C
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
55
55
± 15
± 20
1001
1001
300
300
175
UNIT
V
V
V
V
A
A
A
W
˚C
1 Maximum continuous current limited by package.
October 1999
1
Rev 1.100
1 page  
Philips Semiconductors
N-channel logic level TrenchMOS™ transistor
Product specification
PSMN004-55W
Drain current, ID (A)
100
90 VDS > ID X RDS(ON)
80
70
60
50
40
30 175 C
20
Tj = 25 C
10
0
0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 2.2 2.4 2.6 2.8 3
Gate-source voltage, VGS (V)
Fig.7. Typical transfer characteristics.
ID = f(VGS)
Transconductance, gfs (S)
220
VDS > ID X RDS(ON)
200
Tj = 25 C
180
160
140
120
100
80
60
40
20
0
0 10 20 30 40 50 60 70 80
Drain current, ID (A)
175 C
90 100
Fig.8. Typical transconductance, Tj = 25 ˚C.
gfs = f(ID)
Normalised On-state Resistance
2.4
2.2
2
1.8
1.6
1.4
1.2
1
0.8
0.6
0.4
0.2
0
-60 -40 -20 0 20 40 60 80 100 120 140 160 180
Junction temperature, Tj (C)
Fig.9. Normalised drain-source on-state resistance.
RDS(ON)/RDS(ON)25 ˚C = f(Tj)
Threshold Voltage, VGS(TO) (V)
2.25
2 maximum
1.75
1.5 typical
1.25
1 minimum
0.75
0.5
0.25
0
-60 -40 -20
0 20 40 60 80 100 120 140 160 180
Junction Temperature, Tj (C)
Fig.10. Gate threshold voltage.
VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS
1.0E-01 Drain current, ID (A)
1.0E-02
1.0E-03
1.0E-04
1.0E-05
minimum
typical
maximum
1.0E-06
0
0.5 1 1.5 2
Gate-source voltage, VGS (V)
2.5
3
Fig.11. Sub-threshold drain current.
ID = f(VGS); conditions: Tj = 25 ˚C; VDS = VGS
Capacitances, Ciss, Coss, Crss (pF)
100000
10000
1000
Ciss
Coss
Crss
100
0.1
1 10
Drain-Source Voltage, VDS (V)
100
Fig.12. Typical capacitances, Ciss, Coss, Crss.
C = f(VDS); conditions: VGS = 0 V; f = 1 MHz
October 1999
5
Rev 1.100
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet PSMN004-55W.PDF ] | |
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