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PDF MX93032-MI Data sheet ( Hoja de datos )
| Número de pieza | MX93032-MI | |
| Descripción | APPLICATION NOTE [M1 VERSION] | |
| Fabricantes | Macronix International | |
| Logotipo |  |
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MX93032
APPLICATION NOTE [M1 VERSION]
1.0 GENERAL DESCRIPTIONS
• MX93032-M1 is an engine chip on which digital an-
swering machine (DAM) with full duplex speaker phone
is implemented. Besides, CAS tone detection capa-
bility and FSK decoder for Caller-ID service has also
been implemented as well.
• It provides speech processing / management mod-
ules, including speech compression/decompression,
silence management, telephone line signal process-
ing, Macronix MX29F16A FLASH management, line
echo cancellation and acoustical echo cancellation,
etc.
• The MX93032-M1 has built-in DSP mode and MCU
mode. In DSP mode, users do not need external mi-
croprocessors and can effectively reduce the overall
system cost in DAM with full-duplex speakerphone
system. In MCU mode, the MX93032-M1 is controlled
by an MCU (micro controller) via a 8 bit parallel or
serial interface.
2.0 FEATURES
• Switchable 4.8kbps/12.8kbps speech compression/
decompression algorithm for message recording/play-
back.
• Minimum 15 or 40 minutes of recording time for one
16M bits MX29F16A FLASH based on 12.8K or 4.8K
compression rate, respectively.
• Low (4.8kbps) or High (12.8kbps) compression rate
with silence management technique for voice prompt
making.Voice prompt can be stored in Flash memory.
• Support total 127 messages, maximum 7 OGMs and
maximum 8 personal mailboxes.
• DTMF generation and detection with near-end echo
cancellation.
• Provide single low crystal solution (FLL).
• Built-in DSP mode and MCU mode. In DSP mode,
user can mask the system code into the MX93032-
M1. In MCU mode, user can control the MX93032-M1
via MCU (micro controller).
• Provide standard sample program written by 8051
assemble for customer development.
• Full duplex speakerphone with both acoustical echo
canceller (AEC) and line echo canceller (LEC)
• Built-in CAS signal detector for monitoring the pres-
ence CPE alerting signal in Calling Identity Delivery
on Call Waiting.
• FSK decoder for Calling Identity Delivery on CID Type
I and CID Type II
• Caller ID Type II can be turned on under speaker phone
mode
• Auto detecting MCU mode and DSP mode
P/N:PM0689
REV. 1.0.3,DEC. 13, 1999
1
1 page  
MX93032
5.0 PIN DESCRIPTIONS
POWER/CLOCK/CONTROL PINS :
SYMBOL PIN TYPE PIN NUMBER
VDD
23, 43, 69, 84
GND
24, 44, 53, 70, 85
X1/VDD
88
X2/GND
89
RST\
IS
96
XF\ OA
14
HOLD\
EROM
NMI\
INT1\
X32O
X32I
FLLEN\
IS
IS
IS
IS
IS
67
97
41
40
13
12
54
P/S IS
20
PDN
IS
16
DESCRIPTION
5V power source
Ground
32.256MHz crystal input/Connect to VDD in single low X'tal mode
32.256MHz crystal output/Connect to GND in single low X'tal mode
Power-on reset
External flag if UPMODX=1. This pin can be directly written by one
DSP instruction. Default inactive (5V output)
Hold DSP clock down and release bus
Disable internal ROM, use external ROM only
Non-maskable interrupt pin
Interrupt pin
32.768KHz crystal output
32.768KHz crystal input
1 : Dual X'tal mode
0 : Single low X'tal mode
1:Parallel interface in MCU mode
0:Seriall interface in MCU mode
0:POWER DOWN
CODEC INTERFACE PINS :
SYMBOL PIN TYPE PIN NUMBER
CFS OA
35
CMCK
OA
36
CDX0
OA
34
CDR0
IS
38
CDX1
OA
66
CDR1
IS
15
SDEN\ OB
98
SDATA OB
99
DESCRIPTION
Codec frame sync, 8KHz (9.6KHz). Output low in power down mode.
Codec master clock, 1.536MHz. Output low in power down mode.
Codec data transmit
Codec data receive
Codec data transmit
Codec data receive
Serial data enable(for MXIC codec family)
Serial data transmit(for MXIC codec family)
IPT : Input port
SYMBOL PIN TYPE
IPT4-IPT5, IS
IPT8
IPT0-IPT3 ISH
PIN NUMBER
18-17,93
22-19
DESCRIPTION
Input port
Input port with internal pull high resistor (R=30KW)
P/N:PM0689
REV. 1.0.3, DEC. 13, 1999
5
5 Page 
MX93032
Configuration 2 :
In this configuration, the BIOS+ALGORITHM code is running in the MX93032-M1 internal ROM and the control code
running in the external low-speed EPROMs. The MX93032-M1 pin 97 (EROM) must be set to low.
DSP internal ROM
0000H
26K words
BIOS+ALGORITHM c
(address 0000H - 67F
6800H
7F FFH
External low-speed EPROMs
0000H
1000H
8000H
E000H
FFF FH
max. 8K words
external voice promp
data address 1000H
external voice promp
program address 800
control code
(address E000H - FF
This configuration can be used at the development stage or for production.The control code must start with two words
1234H and 5678H.
P/N:PM0689
REV. 1.0.3, DEC. 13, 1999
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MX93032-MI.PDF ] | |
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