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PDF MAX7651 Data sheet ( Hoja de datos )
| Número de pieza | MAX7651 | |
| Descripción | Flash Programmable 12-Bit Integrated Data-Acquisition Systems | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2119; Rev 0; 8/01
Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
General Description
The MAX7651/MAX7652 are complete 12-bit data-acqui-
sition systems featuring an algorithmic, switched-capaci-
tor, analog-to-digital converter (ADC), a pulse-
width-modulated digital-to-analog converter (DAC), three
timer/counters, and an industry-standard 8051 micro-
processor core with a variety of I/O peripherals. Power-
down capability and full functionality with supply voltages
as low as +3V make the MAX7651/MAX7652 suitable for
portable and power-sensitive applications.
The MAX7651/MAX7652 perform fully differential voltage
measurements with 12-bit resolution, programmable gain,
and separate track-and-hold for both positive and nega-
tive inputs. The converter accepts versatile input modes
consisting of four 2-channel signal pairs or eight 1-chan-
nel signals relative to a floating common.
The MAX7651/MAX7652 microprocessor systems feature
a CPU, 256 bytes of RAM, two 8kB flash memory, four
8-bit I/O ports, two UARTs, an interrupt controller, and a
watchdog timer. Only four clock cycles are required to
complete each microprocessor instruction.
The MAX7651/MAX7652 are available in 64-pin TQFP
packages.
Applications
Hand-Held Instruments
Portable Data-Acquisition Systems
Temperature Controllers
Smart Transmitters
Data Loggers
Multi-Channel Data-Acquisition with Data Formatting
Features
o 12-Bit 53ksps ADC with Fully Differential Inputs
o Dual 8-Bit PWM DAC Outputs
o Three Timers
o 4-Clock Cycle 8051-Compatible Instruction Set
with Dual Data Pointers
o Programmable Watchdog Supervisor
o Four Parallel I/O Ports
o Dual Serial I/O Ports (up to 375kb)
o +3V or +5V Single-Supply Operation
o DC to 12MHz Clock Speed
o 64-Pin TQFP Package
PART
MAX7651CCB
MAX7651ECB
MAX7652CCB
MAX7652ECB
Ordering Information
TEMP. RANGE
0°C to +70°C
-40°C to +85°C
0°C to +70°C
-40°C to +85°C
PIN-PACKAGE
64 TQFP
64 TQFP
64 TQFP
64 TQFP
Pin configuration appears at end of data sheet.
Functional Diagram
MAX7651
MAX7652
FOUR
8-BIT
I/O
PORTS
256 BYTES
RAM
SFR BUS
UPPER
8k BYTE
FLASH
2000H–
3FCOH
LOWER
8k BYTE
FLASH
0000H–
1FFFH
8051
CPU
MEMORY ADDRESS
AND DATA BUSES
INTERRUPT
CONTROLLER
EXT MEM
INT0
INT1
WATCHDOG
TIMER
SERIAL
PORT 0
SERIAL
PORT 1
TIMER 0
TIMER 1
TIMER 2
PULSE-
WIDTH
MODULATOR
TXD RXD TXD RXD T0 T1 T2
T2_OUT
PWMA PWMB
T2_OUT
OUTPUT OUTPUT
12-BIT
A/D
CONVERTER
AIN0
ANALOG
INPUTS
AIN7
REF+
REF-
ACOM
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
TIMING CHARACTERISTICS
(MAX7651: AVDD = VPWMV = DVDD = VREF+ = +4.5 to +5.5V, VREF- = 0, fXTAL = 12MHz. MAX7652: AVDD = VPWMV = DVDD =
+2.7V to +3.6V, VREF+ = +2.5V, VREF- = 0, ACOM = AVDD/2, fXTAL = 12MHz. TA = TMIN to TMAX, unless otherwise noted. Typical
values are at TA = +25°C.) (Figure 3)
PARAMETER
SYMBOL
CONDITIONS
MIN TYP MAX UNITS
RST Pulse Width (High)
EXTERNAL CLOCK
Clock Frequency
fCK
Clock Period
tCLCL
Clock High Time
tCHCX
Clock Low Time
tCLCX
Clock Rise Time
tCLCH Guaranteed by design
Clock Fall Time
tCHCL Guaranteed by design
INSTRUCTION TIMING CHARACTERISTICS
100 +
(64 x tCK)
83
25
25
µs
12 MHz
ns
ns
ns
10 ns
10 ns
ALE Pulse Width
tLHLL
1.5tCLCL -
20
ns
Address Valid to ALE Low
tAVLL
0.5tCLCL -
15
ns
Address Hold after ALE
Low
tLLAX
0.5tCLCL -
20
ns
ALE Low to Valid
Instruction In
ALE Low to PSEN Low
tLLIV
tLLPL
0.5tCLCL
- 10
2.5tCLC
L - 35
ns
ns
PSEN Pulse Width
tPLPH
2tCLCL
- 15
ns
PSEN Low to Valid
Instruction In
tPLIV
2tCLCL -
35
ns
Input Instruction Hold
after PSEN
tPXIX
0 ns
Input Instruction Float
after PSEN
tPXIZ
tCLCL -
15
ns
Address to Valid Instruction
In
PSEN Low to Address Float
tAVIV
tPLAZ
3tCLCL -
50
10
ns
ns
_______________________________________________________________________________________ 5
5 Page 
Flash Programmable 12-Bit Integrated
Data-Acquisition Systems
ALE
PSEN
RD
PORT 0 INSTRUCTION
IN
PORT 2
tLLDV
tLLWL
tRLDV
tRLRH
tRLAZ
ADDRESS
A0–A7
tAVDV1
tAVDV2
ADDRESS A8–A15 OUT
DATA
IN
tWHLH
tRHDX
tRHD2
ADDRESS
A0–A7
Figure 3b. External Data Memory Read Cycle
ALE
PSEN
WR
tWLWH
tWHLH
PORT 0
INSTRUCTION
IN
PORT 2
ADDRESS
A0–A7
tAVWL1
tAVWL2
tQVWH
tQVWX
DATA OUT
ADDRESS A8–A15 OUT
tWHQX
ADDRESS
A0–A7
Figure 3c. External Program Memory Write Cycle
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet MAX7651.PDF ] | |
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