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PDF MAX5940BESA Data sheet ( Hoja de datos )
| Número de pieza | MAX5940BESA | |
| Descripción | IEEE 802.3af PD Interface Controller For Power-Over-Ethernet | |
| Fabricantes | Maxim Integrated | |
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19-2991; Rev 0; 10/03
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
General Description
The MAX5940A/MAX5940B provide complete interface
function for a powered device (PD) to comply with the
IEEE 802.3af standard in a power-over-ethernet system.
MAX5940A/MAX5940B provide the PD with a detection
signature, a classification signature, and an integrated
isolation switch with programmable inrush current con-
trol. These devices also feature power-mode undervolt-
age lockout (UVLO) with wide hysteresis, and
power-good outputs.
An integrated MOSFET provides PD isolation during
detection and classification. The MAX5940A/MAX5940B
guarantee a leakage current offset of less than 10µA dur-
ing the detection phase. A programmable current limit
prevents high inrush current during power-on. The device
features power-mode UVLO with wide hysteresis and
long deglitch time to compensate for twisted-pair cable
resistive drop and to assure glitch-free transition between
detection, classification, and power-on/-off phases.
The MAX5940A provides an active-high (PGOOD) open-
drain output and a fixed UVLO threshold. The MAX5940B
provides both active-high (PGOOD) and active-low
(PGOOD) outputs and has an adjustable UVLO threshold
with the default value compliant to the 802.3af standard.
The MAX5940A/MAX5940B are designed to work with or
without an external diode bridge.
The MAX5940A/MAX5940B are available in 8-pin SO
packages and are rated over the extended temperature
range of -40°C to +85°C.
IP Phones
Applications
Security Cameras
Wireless Access Nodes IEEE 802.3af Power Devices
Computer Telephony
Features
o Fully Integrated IEEE 802.3af-Compliant PD
Interface
o PD Detection and Programmable Classification
Signatures
o Less than 10µA Leakage Current Offset During
Detection
o Integrated MOSFET For Isolation and Inrush
Current Limiting
o Gate Output Allows External Control of the
Internal Isolation MOSFET
o Programmable Inrush Current Control
o Programmable Undervoltage Lockout
(MAX5940B Only)
o Wide UVLO Hysteresis Accommodates Twisted-
Pair Cable Voltage Drop
o PGOOD/PGOOD Outputs to Enable Downstream
DC-DC Converters
o -40°C to +85°C Operating Temperature Range
Ordering Information
PART
MAX5940AESA
MAX5940BESA
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-
PACKAGE
8 SO
8 SO
UVLO
Fixed
Adjustable
Pin Configurations appear at end of data sheet.
Typical Operating Circuits
D1*
GND
60V
D2*
-48V
*OPTIONAL.
68nF RDISC
25.5kΩ
RCL
2
RCLASS
8
GND
MAX5940A
36
GATE PGOOD
4
VEE
5
OUT
Typical Operating Circuits continued at end of data sheet.
DC-DC CONVERTER
V+
COUT MAX5014
GND
SS_SHDN
CGATE
VREG
LOAD
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Typical Operating Characteristics (continued)
(VIN = (GND - VEE) = 48V, GATE = PGOOD = PGOOD = OUT = OPEN, UVLO = VEE (MAX5940B), TA = -40°C to +85°C. Typical values
are at TA = +25°C. All voltages are referenced to VEE, unless otherwise noted.)
PGOOD OUTPUT LOW VOLTAGE
vs. CURRENT
400
320
OUT LEAKAGE CURRENT
vs. TEMPERATURE
20
VOUT = 67V
16
INRUSH CURRENT CONTROL (VIN = 12V)
MAX5940A/B toc09
VGATE
5V/div
240
160
80
0
0
12
8
4
5 10 15
ISINK (mA)
20
0
-40
INRUSH CURRENT CONTROL (VIN = 48V)
MAX5940A/B toc10
-15 10 35 60
TEMPERATURE (°C)
VGATE
5V/div
IINRUSH
100mA/div
VOUT TO VEE
10V/div
PGOOD
10V/div
85 1ms/div
INRUSH CURRENT CONTROL (VIN = 67V)
MAX5940A/B toc11
VGATE
5V/div
2ms/div
IINRUSH
100mA/div
VOUT TO VEE
50V/div
PGOOD
50V/div
2ms/div
IINRUSH
100mA/div
VOUT TO VEE
50V/div
PGOOD
50V/div
_______________________________________________________________________________________ 5
5 Page 
IEEE 802.3af PD Interface Controller
For Power-Over-Ethernet
Typical Application Circuits (continued)
Application Circuit 2
Diode D1 prevents the power-over-ethernet to back
drive the wall adapter. Whenever the wall adapter
power is available, the GATE is pulled low to pinch off
the power-over-ethernet. R3 provides the GATE current
flow path. The wall adapter power pollutes the discov-
ery signature, preventing PSE from detecting this PD.
GND
60V
RDISC
25.5kΩ
68nF
-48V
WALL
ADAPTER
SUPPLY
RCL
D1
1 UVLO
8
GND
2 RCLASS
7
PGOOD
3 GATE
MAX5940B
PGOOD
6
4 VEE
OUT 5
R3
10kΩ
CGATE
DC-DC CONVERTER
V+
COUT MAX5014
GND
SS_SHDN
VREG
LOAD
Figure 5. Adding Wall Adapter Input Supply (Wall Adapter Supply Takes Precedence Over Power-Over-Ethernet)
______________________________________________________________________________________ 11
11 Page | ||
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| PDF Descargar | [ Datasheet MAX5940BESA.PDF ] | |
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