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PDF MAX4717EUB Data sheet ( Hoja de datos )
| Número de pieza | MAX4717EUB | |
| Descripción | 4.5 /20 / 300MHz Bandwidth / Dual SPDT Analog Switches in UCSP | |
| Fabricantes | Maxim Integrated | |
| Logotipo |  |
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19-2627; Rev 0; 10/02
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
General Description
The MAX4717/MAX4718 low-voltage, low on-resistance
(RON), dual single-pole/double throw (SPDT) analog
switches operate from a single +1.8V to +5.5V supply.
These devices are designed for USB 1.1 and audio
switching applications.
The MAX4717 features two 4.5Ω RON (max) SPDT
switches with 1.2Ω flatness and 0.3Ω matching between
channels. The MAX4718 features one 4.5Ω RON (max)
SPDT switch and one 20Ω RON (max) SPDT switch. The
20Ω switch has a guaranteed matching and flatness of
0.4Ω and 1.2Ω, respectively. These switches offer break-
before-make switching (1ns) with tON <80ns and tOFF
<40ns at +2.7V. The digital logic inputs are +1.8V logic
compatible with a +2.7V to +3.6V supply.
These switches are packaged in a chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 2.0mm ✕ 1.50mm area
and has a 4 ✕ 3 bump array with a bump pitch of
0.5mm. These switches are also available in a 10-pin
µMAX package.
Applications
USB 1.1 Signal Switching Circuits
Battery-Operated Equipment
Audio/Video-Signal Routing
Headphone Switching
Low-Voltage Data-Acquisition Systems
Sample-and-Hold Circuits
Cell Phones
PDAs
UCSP is a trademark of Maxim Integrated Products, Inc.
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
Features
o USB 1.1 Signal Switching Compliant
o 2ns (max) Differential Skew
o -3dB Bandwidth: >300MHz
o Low 15pF On-Channel Capacitance
o Single-Supply Operation from +1.8V to +5.5V
o 4.5Ω RON (max) Switches (MAX4717/MAX4718)
0.3Ω (max) RON Match (+3.0V Supply)
1.2Ω (max) Flatness (+3.0V Supply)
o 20Ω RON (max) Switch (MAX4718)
0.4Ω (max) RON Match (+3.0V Supply)
1.2Ω (max) Flatness (+3.0V Supply)
o Rail-to-Rail® Signal Handling
o High Off-Isolation: -55dB (10MHz)
o Low Crosstalk: -80dB (10MHz)
o Low Distortion: 0.03%
o +1.8V CMOS-Logic Compatible
o <0.5nA Leakage Current at +25°C
Ordering Information
PART
TEMP RANGE
PIN/BUMP-
PACKAGE
TOP
MARK
MAX4717EUB
-40°C to +85°C 10 µMAX
—
MAX4717EBC-T* -40°C to +85°C 12 UCSP-12 ABH
MAX4718EUB
-40°C to +85°C 10 µMAX
—
MAX4718EBC-T* -40°C to +85°C 12 UCSP-12 ABI
Note: UCSP package requires special solder temperature pro-
file described in the Absolute Maximum Ratings section.
*UCSP reliability is integrally linked to the user’s assembly meth-
ods, circuit board material, and environment. See the UCSP reli-
ability notice in the UCSP Reliability section of this data sheet for
more information.
Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
(BUMP SIDE DOWN)
MAX4717/MAX4718
GND
NC1 C1 B1 A1 NC2
IN1 C2
A2 IN2
COM1 C3
A3 COM2
NO1 C4
B4
V+
UCSP
A4 NO2
PART
MAX4717
MAX4718
SPDT1
4.5Ω
4.5Ω
SPDT2
4.5Ω
20Ω
MAX4717/MAX4718
IN_ NO_ NC_
0 OFF ON
1 ON OFF
SWITCHES SHOWN FOR LOGIC "0" INPUT
MAX4717/MAX4718
V+ 1
NO1 2
COM1 3
IN1 4
NC1 5
10 NO2
9 COM2
8 IN2
7 NC2
6 GND
µMAX
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
1 page  
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, VIH = +2.0V, VIL = +0.8V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at V+ = +5.0V,
TA = +25°C, unless otherwise noted.) (Notes 3, 4)
PARAMETER
SYMBOL
CONDITIONS
TA MIN TYP MAX UNITS
ANALOG SWITCH (High RON—MAX4718 SPDT 2)
On-Resistance (Note 5)
RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
+25°C
TMIN to
TMAX
12 20
25
Ω
On-Resistance Match Between
Channels (Notes 5, 6)
∆RON
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 3.5V
+25°C
TMIN to
TMAX
0.15
0.4
0.5
Ω
On-Resistance Flatness
(Note 7)
RFLAT(ON)
V+ = 4.2V, ICOM_ = 10mA;
VNO_ or VNC_ = 1.0V, 2.0V, 4.5V
+25°C
TMIN to
TMAX
0.4 1.2
1.5
Ω
NO_, NC_ Off-Leakage Current
(Note 8)
+25°C -0.5 +0.01 +0.5
INO_(OFF), V+ = 5.5V; VCOM_ = 1.0V, 4.5V;
INC_(OFF) VNO_ or VNC_= 1.0V, 4.5V
TMIN to
TMAX
-1
+1
nA
COM_ On-Leakage Current
(Note 8)
V+ = 5.5V, VCOM_ = 1.0V, 4.5V; +25°C
-1 +0.01 +1
ICOM_(ON) VNO_ or VNC_ = 1.0V, 4.5V, or
floating
TMIN to
TMAX
-2
+2
nA
DYNAMIC CHARACTERISTICS
Turn-On Time
+25°C
tON
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
TMIN to
TMAX
30 80
100
ns
Turn-Off Time
tOFF
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 1
+25°C
TMIN to
TMAX
20 40
50
ns
Break-Before-Make Time Delay
(Note 8)
tBBM
VNO_, VNC_ = 3.0V;
RL = 300Ω, CL = 35pF, Figure 2
+25°C
TMIN to
TMAX
1
8
ns
Skew (Note 8)
tSKEW RS = 39Ω, CL = 50pF, Figure 3
TMIN to
TMAX
0.15 2
ns
DIGITAL I/O
Input Logic High Voltage
Input Logic Low Voltage
Input Leakage Current
VIH
VIL
IIN V+ = 5.5V, VIN_ = 0V or V+
TMIN to
TMAX
TMIN to
TMAX
TMIN to
TMAX
2.0
-100
V
0.8 V
+100
nA
_______________________________________________________________________________________ 5
5 Page 
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams
MAX4717/
MAX4718
VN_
NO_
OR NC_
LOGIC
INPUT
IN_
GND
V+
V+
COM_
RL
VOUT
CL
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
( )VOUT = VN_
RL
RL + RON
Figure 1. Switching Time
LOGIC
INPUT
VIH
VIL
50%
tr < 5ns
tf < 5ns
SWITCH 0V
OUTPUT
tOFF
VOUT 0.9 x V0UT
0.9 x VOUT
tON
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
MAX4717/
MAX4718
VN_
LOGIC
INPUT
V+
V+
NC_
COM_
NO_
IN_
GND
VOUT
RL
300Ω
CL
35pF
CL INCLUDES FIXTURE AND STRAY CAPACITANCE.
Figure 2. Break-Before-Make Interval
LOGIC
INPUT
VIH
VIL
50%
VOUT
0.9 x VOUT
tBBM
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet MAX4717EUB.PDF ] | |
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