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PDF MAX4713CUE Data sheet ( Hoja de datos )
| Número de pieza | MAX4713CUE | |
| Descripción | Fault-Protected / Low-Voltage / Quad SPST Analog Switches | |
| Fabricantes | Maxim Integrated | |
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19-1907; Rev 0; 1/01
Fault-Protected, Low-Voltage,
Quad SPST Analog Switches
General Description
The MAX4711/MAX4712/MAX4713 are fault-protected,
Rail-to-Rail®, low-voltage analog switches featuring low
on-resistance and guaranteed on-resistance flatness over
the specified signal range. Due to the fault protection fea-
ture the analog switch input (NO_ or NC_) and output
(COM_) pins are not symmetrical. The fault protection fea-
ture allows for the analog input to go beyond the plus or
minus supplies without the device drawing excessive
amounts of current from the analog inputs. When the ana-
log inputs are driven beyond the supply rails when the
switch is on, it will sense a fault and turn itself off and the
analog switch output will be clamped to the same polarity
supply as the input signal and will not go beyond the sup-
ply rails. This feature protects any electronic circuitry con-
nected to the output from excessive voltages present on
the analog inputs.
The MAX4711/MAX4712/MAX4713 are quad, single-
pole/single-throw (SPST) analog switches. The MAX4711
has four normally closed switches (NC), the MAX4712 has
four normally open switches (NO), and the MAX4713 has
two NO and two NC switches. Switching times are less
than 125ns for tON, and less than 80ns for tOFF. These
switches operate from a single +2.7V to +11V supply or
from dual ±2.7V to ±5.5V supplies. All digital inputs have
+0.8V to +2.4V logic thresholds, ensuring both TTL and
CMOS logic compatibility when using ±4.5V to ±5.5V or
single +4.5V to +11V supplies.
________________________Applications
Communication Systems
Battery-Operated Systems
Signal Routing
Test Equipment
Data-Acquisition
Industrial and Process Control Systems
Avionics
Redundant/Backup Systems
Pin Configurations/Functional Diagrams/Truth Tables
continued at end of data sheet.
Rail-to-Rail is a registered trademark of Nippon Motorola, Inc.
Features
o Fault-Protected Analog Inputs
o ±12V Fault Protection with Power Off
o ±7V Fault Protection with ±5V Supplies
o +12V and -7V Fault Protection with +5V Supply
o +12V and -9V Fault Protection with +3V Supply
o Fault-Protected Digital Inputs May Exceed V+
Supply Rail
o All Switches Off with Power Off
o Rail-to-Rail Signal Handling
o Output Clamped to Appropriate Supply Voltages
During Fault Condition
o 25Ω max RON at +25°C
o 1Ω max On-Resistance Match Between Channels
o Single and Dual Supply Operation
o Pin-Compatible with Industry Standard
MAX391/MAX392/MAX393
o TTL and CMOS Compatible Logic Inputs
Ordering Information
PART
TEMP. RANGE
PIN-PACKAGE
MAX4711CUE
0°C to +70°C
16 TSSOP
MAX4711CSE
MAX4711CPE
0°C to +70°C
0°C to +70°C
16 Narrow SO
16 Plastic Dip
MAX4711EUE
MAX4711ESE
-40°C to +85°C
-40°C to +85°C
16 TSSOP
16 Narrow SO
MAX4711EPE
-40°C to +85°C
16 Plastic Dip
Ordering Information continued at end of data sheet.
Pin Configurations/Functional
Diagrams/Truth Tables
TOP VIEW
IN1 1
COM1 2
NC1 3
V- 4
GND 5
NC4 6
COM4 7
IN4 8
MAX4711
16 IN2
15 COM2
14 NC2
13 V+
12 N.C.
11 NC3
10 COM3
9 IN3
DIP/SO/TSSOP
MAX4711
LOGIC
SWITCH
0 ON
1 OFF
N.C. = NOT CONNECTED
________________________________________________________________ Maxim Integrated Products 1
For price, delivery, and to place orders, please contact Maxim Distribution at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1 page  
Fault-Protected, Low-Voltage,
Quad SPST Analog Switches
ELECTRICAL CHARACTERISTICS—+5V Single Supply (continued)
(V+ = +4.5V to +5.5V, V- = 0, VIH = +2.4V, VIL = +0.8V, GND = 0, TA = TMIN to TMAX, unless otherwise noted. Typical values are at
TA = +25°C.) (Note 3)
PARAMETER
Fault-Protected Analog Signal
Range
COM_ Output-Leakage Current,
Supplies ON (Note 5)
NO_ or NC_ Off-Leakage
Current, Supplies ON (Note 5)
NO_ or NC_ Input-Leakage
Current, Supplies OFF (Note 5)
Output Clamp Current
Output Clamp Resistance
+Fault Output Turn-On Delay
Time
SYMBOL
CONDITIONS
VNO_,VNC_ Power off
ICOM_
INO_, INC_
INO_, INC_
ICOM_
RCLAMP_
All channels off; VNO_, VNC_ =
+12V or -7V, V+ = +5V
VNO_, VNC_ = +12V or -7V
V+ = +5V
VNO_, VNC_ = ±12V,
V± = 0
VNO_, VNC_ = +12V, V+ = 5V
Clamp on
VNO_, VNC_ = +12V,
RL = 300Ω, V+ = +5V
TA
C, E
+25°C
C, E
+25°C
C, E
+25°C
C, E
C, E
+25°C
+25°C
MIN
-12
-50
-500
-50
-500
-0.5
-5
2
TYP
6
500
200
MAX UNITS
+12 V
50
nA
500
50
nA
500
0.5
µA
5
11 mA
Ω
ns
+Fault Recovery Time
LOGIC INPUT
Input Logic High
Input Logic Low
Input-Leakage Current (Note 5)
SWITCH DYNAMICS
Turn-On Time
Turn-Off Time
Break-Before-Make Time Delay
(MAX4713 only)
VIH
VIL
IIN
tON
tOFF
tBBM
VNO_, VNC_ = +12V,
RL = 300Ω, V+ = +5V
+25°C
500
VIN_ = 0 or V+
C, E 2.4
C, E
C, E -1
0.8
1
VNO_ or VNC_ = +3V,
RL = 300Ω, CL = 35pF, Figure 2
VNO_ or VNC_ = +3V,
RL = 300Ω, CL = 35pF, Figure 2
VNO_ or VNC_ = +3V,
RL = 300Ω, CL = 35pF, Figure 2
+25°C
C, E
+25°C
C, E
+25°C
C, E
30
20
170 230
275
55 100
125
115
µs
V
V
µA
ns
ns
ns
Charge Injection
Q
VGEN= 0, RGEN = 0, CL = 1nF,
Figure 4
+25°C
-1
pC
POWER SUPPLY
Power-Supply Range
V+ Supply Current
V+
I+ All VIN_ = 0 or V+
C, E +2.7
+11 V
+25°C
C, E
34 65
µA
75
_______________________________________________________________________________________ 5
5 Page 
Fault-Protected, Low-Voltage,
Quad SPST Analog Switches
V+
NO_
(NC_)
IN_
NORMALLY OPEN SWITCH CONSTRUCTION
HIGH
FAULT
LOW
FAULT
ON
N1
P2
P1
COM_
GND
V-
-ESD DIODE
NC SWITCH
N2
Figure 1. Block Diagram
NC_) and COM_ so that signals pass equally well in
either direction.
Positive Fault Condition
When the signal on NO_ (or NC_) exceeds V+ by about
150mV, the high-fault comparator output is high, turn-
ing off FETs N1 and P1. This makes the NO_ (or NC_)
input high impedance regardless of the switch state. If
the switch state is “off”, all FETs are turned off and both
NO_ (or NC_) and COM_ are high impedance. If the
switch state is “on”, clamp FET P2 is turned on, sourc-
ing current from V+ to COM_.
Negative Fault Condition
When the signal on NO_ (or NC_) exceeds V- by about
150mV, the low-fault comparator output is high, turning
off FETs N1 and P1. This makes the NO_ (or NC_) input
high impedance regardless of the switch state. If the
switch state is “off”, all FETs are turned off and both
NO_ (or NC_) and COM_ are high impedance. If the
switch state is “on”, clamp FET N2 is turned on, sinking
current from COM_ to V-.
Transient Fault Response and Recovery
When a fast rise-time or fall-time transient on NC_ or
NO_ exceeds V+ or V-, the output (COM_) follows the
input to the supply rail with only a few nanoseconds
delay. This delay is due to the switch on-resistance and
circuit capacitance to ground. When the input transient
returns to within the supply rails, however, there is a
700ns output recovery delay time. These values
depend on the COM_ output resistance and capaci-
tance, and are not production tested or guaranteed.
The delays are not dependent on the fault amplitude.
Higher COM_ output resistance and capacitance
increase recovery times.
COM_ and IN_ Pins
FETs N2 and P2 can source about ±15mA from V+ or
V- to COM_ in the fault condition. Ensure that if the
COM_ pin is connected to a low-resistance load, the
absolute maximum current rating of 40mA is never
exceeded both in normal and fault conditions.
______________________________________________________________________________________ 11
11 Page | ||
| Páginas | Total 17 Páginas | |
| PDF Descargar | [ Datasheet MAX4713CUE.PDF ] | |
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