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PDF PHX1N40 Data sheet ( Hoja de datos )

Número de pieza PHX1N40
Descripción PowerMOS transistor
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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Philips Semiconductors
PowerMOS transistor
Product specification
PHX1N40
GENERAL DESCRIPTION
N-channel enhancement mode
field-effect power transistor in a full
pack plastic envelope featuring high
avalanche energy capability, stable
off-state characteristics, fast
switching and high thermal cycling
performance with low thermal
resistance. Intended for use in
Switched Mode Power Supplies
(SMPS), motor control circuits and
general purpose switching
applications.
QUICK REFERENCE DATA
SYMBOL PARAMETER
VDS
ID
Ptot
RDS(ON)
Drain-source voltage
Drain current (DC)
Total power dissipation
Drain-source on-state resistance
MAX.
400
1.7
25
3.5
UNIT
V
A
W
PINNING - SOT186A
PIN DESCRIPTION
1 gate
2 drain
3 source
case isolated
PIN CONFIGURATION
case
12 3
SYMBOL
d
g
s
LIMITING VALUES
Limiting values in accordance with the Absolute Maximum System (IEC 134)
SYMBOL PARAMETER
CONDITIONS
ID Continuous drain current
IDM
PD
PD/Tmb
VGS
EAS
IAS
Pulsed drain current
Total dissipation
Linear derating factor
Gate-source voltage
Single pulse avalanche
energy
Peak avalanche current
Tj, Tstg
Operating junction and
storage temperature range
Ths = 25 ˚C; VGS = 10 V
Ths = 100 ˚C; VGS = 10 V
Ths = 25 ˚C
Ths = 25 ˚C
Ths > 25 ˚C
VDD 50 V; starting Tj = 25˚C; RGS = 50 ;
VGS = 10 V
VDD 50 V; starting Tj = 25˚C; RGS = 50 ;
VGS = 10 V
MIN.
-
-
-
-
-
-
-
-
- 55
MAX.
1.7
1.1
7
25
0.2
± 30
100
2.5
150
UNIT
A
A
A
W
W/K
V
mJ
A
˚C
ISOLATION LIMITING VALUE & CHARACTERISTIC
Ths = 25 ˚C unless otherwise specified
SYMBOL PARAMETER
CONDITIONS
Visol R.M.S. isolation voltage from all f = 50-60 Hz; sinusoidal
three terminals to external
waveform;
heatsink
R.H. 65% ; clean and dustfree
Cisol Capacitance from T2 to external f = 1 MHz
heatsink
MIN. TYP. MAX. UNIT
- 2500 V
- 10 - pF
June 1997
1
Rev 1.000

1 page




PHX1N40 pdf
Philips Semiconductors
PowerMOS transistor
Product specification
PHX1N40
Gate-Source voltage, VGS (Volts)
20
ID = 2.5 A
200 V
100 V
15
PHP2N40
VDD = 320 V
10
5
0
0 10 20 30 40
Gate charge, Qg (nC)
Fig.13. Typical turn-on gate-charge characteristics.
VGS = f(QG); parameter VDS
Switching times, td(on), tr, td(off), tf (ns)
1000
VDD = 200V
RD = 78 Ohms
Tj = 25 C
100
td(off)
tr
10 tf
td(on)
PHP2N40
1
0 20 40 60 80
Gate resistance, RG (Ohms)
Fig.14. Typical switching times.
td(on), tr, td(off), tf = f(RG)
100
Normalised Drain-source breakdown voltage
1.15
V(BR)DSS @ Tj
V(BR)DSS @ 25 C
1.1
1.05
1
0.95
0.9
0.85
-100
-50 0 50 100
Tj, Junction temperature (C)
150
Fig.15. Normalised drain-source breakdown voltage.
V(BR)DSS/V(BR)DSS 25 ˚C = f(Tj)
10 Source-drain diode current, IF(A)
VGS = 0 V
8
150 C
6
PHP2N40
Tj = 25 C
4
2
0
0 0.5 1 1.5
Source-Drain voltage, VSDS (V)
Fig.16. Source-Drain diode characteristic.
IF = f(VSDS); parameter Tj
EAS, Normalised unclamped inductive energy (%)
120
110
100
90
80
70
60
50
40
30
20
10
0
20 40 60 80 100 120 140
Starting Tj ( C)
Fig.17. Normalised unclamped inductive energy.
EAS% = f(Tj)
VGS
0
RGS
L
VDS
T.U.T.
+ VDD
-
-ID/100
R 01
shunt
Fig.18. Unclamped inductive test circuit.
EAS = 0.5 LID2 V(BR)DSS/(V(BR)DSS VDD)
June 1997
5
Rev 1.000

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