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PDF MC10ELT25 Data sheet ( Hoja de datos )
| Número de pieza | MC10ELT25 | |
| Descripción | Differential ECL to TTL Translator | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC10ELT25, MC100ELT25
-5 V Differential ECL to TTL
Translator
Description
The MC10ELT/100ELT25 is a differential ECL to TTL translator.
Because ECL levels are used, a +5 V, −5.2 V (or −4.5 V) and ground
are required. The small outline 8-lead package and the single gate of
the ELT25 makes it ideal for those applications where space,
performance and low power are at a premium.
The VBB pin, an internally generated voltage supply, is available to
this device only. For single-ended input conditions, the unused
differential input is connected to VBB as a switching reference voltage.
VBB may also rebias AC coupled inputs. When used, decouple VBB
and VCC via a 0.01 mF capacitor and limit current sourcing or sinking
to 0.5 mA. When not used, VBB should be left open.
The 100 Series contains temperature compensation.
Features
• 2.6 ns Typical Propagation Delay
• 100 MHz FMAX CLK
• 24 mA TTL Outputs
• Flow Through Pinouts
• Operating Range: VCC = 4.5 V to 5.5 V with GND = 0 V;
VEE = −4.2 V to −5.7 V with GND = 0 V
• Internal Input 50 KW Pulldown Resistors
• Q Output will default HIGH with inputs open or < 1.3 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
8
1
SOIC−8
D SUFFIX
CASE 751
MARKING DIAGRAMS*
8
HLT25
ALYW
G
1
8
KLT25
ALYW
G
1
8
1
TSSOP−8
DT SUFFIX
CASE 948R
8
HT25
ALYWG
G
1
8
KT25
ALYWG
G
1
DFN8
MN SUFFIX
CASE 506AA
14
14
H = MC10
A = Assembly Location
K = MC100
L = Wafer Lot
5F = MC10
Y = Year
2U = MC100
W = Work Week
M = Date Code G = Pb−Free Package
(Note: Microdot may be in either location)
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 14
1
Publication Order Number:
MC10ELT25/D
1 page  
MC10ELT25, MC100ELT25
ORDERING INFORMATION
Device
MC10ELT25DG
Package
SOIC−8
(Pb−Free)
Shipping†
98 Units / Rail
MC10ELT25DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT25DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC10ELT25DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC10ELT25MNR4G
DFN8
(Pb−Free)
1000 / Tape & Reel
MC100ELT25DG
SOIC−8
(Pb−Free)
98 Units / Rail
MC100ELT25DR2G
SOIC−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT25DTG
TSSOP−8
(Pb−Free)
100 Units / Rail
MC100ELT25DTR2G
TSSOP−8
(Pb−Free)
2500 / Tape & Reel
MC100ELT25MNR4G
DFN8
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
www.onsemi.com
5
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet MC10ELT25.PDF ] | |
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