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PDF MC10EL15 Data sheet ( Hoja de datos )

Número de pieza MC10EL15
Descripción 1:4 Clock Distribution Chip
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MC10EL15, MC100EL15
5 V ECL 1:4 Clock
Distribution Chip
The MC10EL/100EL15 is a low skew 1:4 clock distribution chip
designed explicitly for low skew clock distribution applications. The
VBB pin, an internally generated voltage supply, is available to this device
only. For single-ended input conditions, the unused differential input is
connected to VBB as a switching reference voltage. VBB may also rebias
AC coupled inputs. When used, decouple VBB and VCC via a 0.01ĂmF
capacitor and limit current sourcing or sinking to 0.5 mA. When not used,
VBB should be left open.
The EL15 features a multiplexed clock input to allow for the
distribution of a lower speed scan or test clock along with the high
speed system clock. When LOW (or left open and pulled LOW by the
input pulldown resistor) the SEL pin will select the differential clock
input.
The common enable (EN) is synchronous so that the outputs will
only be enabled/disabled when they are already in the LOW state. This
avoids any chance of generating a runt clock pulse when the device is
enabled/disabled as can happen with an asynchronous control. The
internal flip flop is clocked on the falling edge of the input clock,
therefore all associated specification limits are referenced to the
negative edge of the clock input.
The 100 series contains temperature compensation.
Features
50 ps Output-to-Output Skew
Synchronous Enable/Disable
Multiplexed Clock Input
PECL Mode Operating Range:
VCC = 4.2 V to 5.7 V with VEE = 0 V
NECL Mode Operating Range:
VCC = 0 V with VEE = 4.2 V to 5.7 V
Internal Input Pulldown Resistors on CLKs, SCLK, SEL, and EN.
These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
16
1
SOIC16
D SUFFIX
CASE 751B05
MARKING DIAGRAMS*
10EL15G
AWLYWW
100EL15G
AWLYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MC10EL15DG
MC10EL15DR2G
MC100EL15DG
MC100EL15DR2G
Package Shipping
SOIC16
(Pb-Free)
48 Units/Tube
SOIC16 2500/Tape & Reel
(Pb-Free)
SOIC16
(Pb-Free)
48 Units/Tube
SOIC16 2500/Tape & Reel
(Pb-Free)
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
July, 2016 Rev. 7
1
Publication Order Number:
MC10EL15/D

1 page




MC10EL15 pdf
MC10EL15, MC100EL15
Table 8. 100EL SERIES NECL DC CHARACTERISTICS (VCC = 0 V; VEE = 5.0 V (Note 1))
40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VOH
VOL
VIH
VIL
VBB
VIHCMR
Power Supply Current
Output HIGH Voltage (Note 2)
Output LOW Voltage (Note 2)
Input HIGH Voltage (Single-Ended)
Input LOW Voltage (Single-Ended)
Output Voltage Reference
Input HIGH Voltage Common Mode
Range (Differential) (Note 3)
25 35
25 35
25 38
1085 1005 880 1025 955 880 1025 955 880
1830 1695 1555 1810 1705 1620 1810 1705 1620
1165
880 1165
880 1165
880
1810
1475 1810
1475 1810
1475
1.38
1.26 1.38
1.26 1.38
1.26
2.5 0.4 2.5 0.4 2.5 0.4
mA
mV
mV
mV
mV
V
V
IIH Input HIGH Current
150 150 150 mA
IIL Input LOW Current
0.5 0.5 0.5 mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. Input and output parameters vary 1:1 with VCC. VEE can vary +0.8 V / 0.5 V.
2. Outputs are terminated through a 50ĂW resistor to VCC 2.0 V.
3. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential input
signal. Normal operation is obtained if the HIGH level falls within the specified range and the peak-to-peak voltage lies between VPPmin and 1 V.
Table 9. AC CHARACTERISTICS (VCC = 5.0 V; VEE = 0.0 V or VCC= 0 V; VEE = 5.0 V (Note 1))
Symbol
Characteristic
40°C
Min Typ Max
25°C
Min Typ Max
85°C
Min Typ Max
Unit
fMAX
tPLH
tPHL
Maximum Toggle Frequency
Propagation Delay
CLK to Q (Diff)
CLK to Q (SE)
SCLK to Q
1.25 GHz
460 660 470 670 500 700 ps
410 710 420 720 450 750
410 710 420 720 470 750
tSKEW
Part-to-Part Skew
Within-Device Skew (Note 2)
200 200 200 ps
50 50 50
tJITTER
tS
tH
VPP
tr
tf
Random Clock Jitter (RMS)
Setup Time EN
Hold Time EN
Input Swing (Note 3)
Output Rise/Fall Times Q
(20% 80%)
2.6 ps
150 150 150
ps
400 400 400
ps
150 1000 150 1000 150 1000 mV
325 575 325 575 325 575 ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
1. 10 Series: VEE can vary +0.06 V / 0.5 V.
100 Series: VEE can vary +0.8 V / 0.5 V.
2. Skews are specified for identical LOW-to-HIGH or HIGH-to-LOW transitions.
3. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 40.
www.onsemi.com
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