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PDF MC10E101 Data sheet ( Hoja de datos )
| Número de pieza | MC10E101 | |
| Descripción | QUAD 4-INPUT OR/NOR GATE | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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MC10E101, MC100E101
5 V ECL Quad 4‐Input
OR/NOR Gate
Description
The MC10E/100E101 is a quad 4-input OR/NOR gate. The 100
Series contains temperature compensation.
Features
• 500 ps Max. Propagation Delay
• PECL Mode Operating Range:
♦ VCC = 4.2 V to 5.7 V with VEE = 0 V
• NECL Mode Operating Range:
♦ VCC = 0 V with VEE = −4.2 V to −5.7 V
• Internal Input 50 kW Pulldown Resistors
• ESD Protection:
♦ Human Body Model; > 2 kV
♦ Machine Model; > 200 V
• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
• Moisture Sensitivity: Level 3 (Pb-Free)
• Flammability Rating:
♦ UL 94 V−0 @ 0.125 in, Oxygen Index: 28 to 34
• Transistor Count = 115 devices
• These Devices are Pb-Free, Halogen Free and are RoHS Compliant
www.onsemi.com
PLCC−28
FN SUFFIX
CASE 776−02
MARKING DIAGRAM*
MCxxxE101FNG
AWLYYWW
xxx = 10 or 100
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb-Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
Device
MC10E101FNR2G
MC100E101FNR2G
Package
PLCC−28
(Pb-Free)
PLCC−28
(Pb-Free)
Shipping†
500/Tape & Reel
500/Tape & Reel
†For information on tape and reel specifications, in-
cluding part orientation and tape sizes, please refer
to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
© Semiconductor Components Industries, LLC, 2016
July, 2016 − Rev. 9
1
Publication Order Number:
MC10E101/D
1 page  
MC10E101, MC100E101
Driver
Device
Q
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Resource Reference of Application Notes
AN1405/D − ECL Clock Distribution Techniques
AN1406/D − Designing with PECL (ECL at +5.0 V)
AN1503/D − ECLinPSt I/O SPiCE Modeling Kit
AN1504/D − Metastability and the ECLinPS Family
AN1568/D − Interfacing Between LVDS and ECL
AN1672/D − The ECL Translator Guide
AND8001/D − Odd Number Counters Design
AND8002/D − Marking and Date Codes
AND8020/D − Termination of ECL Logic Devices
AND8066/D − Interfacing with ECLinPS
AND8090/D − AC Characteristics of ECL Devices
www.onsemi.com
5
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet MC10E101.PDF ] | |
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