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PDF MC100LVEP111 Data sheet ( Hoja de datos )
| Número de pieza | MC100LVEP111 | |
| Descripción | 2.5V / 3.3V 2:1:10 Differential ECL/PECL/HSTL Clock Driver | |
| Fabricantes | ON Semiconductor | |
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MC100LVEP111
2.5V / 3.3V 2:1:10
Differential ECL/PECL/HSTL
Clock Driver
Description
The MC100LVEP111 is a low skew 2:1:10 differential driver, designed
with clock distribution in mind, accepting two clock sources into an input
multiplexer. The PECL input signals can be either differential or
single−ended (if the VBB output is used). HSTL inputs can be used when
the LVEP111 is operating under PECL conditions.
The LVEP111 specifically guarantees low output−to−output skew.
Optimal design, layout, and processing minimize skew within a device and
from device to device.
To ensure tightest skew, both sides of differential outputs identically
terminate into 50 W even if only one output is being used. If an output
pair is unused, both outputs may be left open (unterminated) without
affecting skew.
The MC100LVEP111, as with most other ECL devices, can be
operated from a positive VCC supply in PECL mode. This allows the
LVEP111 to be used for high performance clock distribution in +3.3 V or
+2.5 V systems. Single−ended CLK input operation is limited to a VCC ≥
3.0 V in PECL mode, or VEE v −3.0 V in NECL mode when using VBB
(See Figure 11). Full operating range is available when using an external
voltage reference (See Figure 10). Designers can take advantage of the
LVEP111’s performance to distribute low skew clocks across the
backplane or the board.
Features
• 85 ps Typical Device−to−Device Skew
• 20 ps Typical Output−to−Output Skew
• Jitter Less than 1 ps RMS
• Additive RMS Phase Jitter: 60 fs @ 156.25 MHz, Typ.
• Maximum Frequency > 3 GHz Typical
• VBB Output
• 430 ps Typical Propagation Delay
• The 100 Series Contains Temperature Compensation
• PECL and HSTL Mode Operating Range: VCC = 2.375 V to 3.8 V
with VEE = 0 V
• NECL Mode Operating Range: VCC = 0 V
with VEE = −2.375 V to −3.8 V
• Open Input Default State
• LVDS Input Compatible
• Fully Compatible with MC100EP111
• These are Pb−Free Devices
www.onsemi.com
MARKING
DIAGRAMS*
LQFP−32
FA SUFFIX
CASE 873A
MC100
LVEP111
AWLYYWWG
32
1
1 32
QFN32
MN SUFFIX
CASE 488AM
1
MC100
LVEP111
AWLYYWW
G
A
WL
YY
WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
*For additional marking information, refer to
Application Note AND8002/D.
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
August, 2015 − Rev. 23
1
Publication Order Number:
MC100LVEP111/D
1 page  
MC100LVEP111
Table 5. PECL DC CHARACTERISTICS VCC = 2.5 V; VEE = 0 V (Note 2)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE Power Supply Current
60 90 120 60 90 120 60 90 120 mA
VOH Output HIGH Voltage (Note 3)
1355 1480 1605 1355 1480 1605 1355 1480 1605 mV
VOL Output LOW Voltage (Note 3)
505 730 900 505 730 900 505 730 900 mV
VIH
Input HIGH Voltage (Single−Ended)
1335
(Note 4)
1620 1335
1620 1275
1620 mV
VIL
Input LOW Voltage (Single−Ended)
505
(Note 4)
875 505
875 505
875 mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 5)
1.2
2.5 1.2
2.5 1.2
2.5 V
IIH Input HIGH Current
150 150 150 mA
IIL Input LOW Current
CLK 0.5
CLK −150
0.5
−150
0.5
−150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.125 V to −1.3 V.
3. All loading with 50 W to VEE.
4. Do not use VBB at VCC < 3.0 V.
5. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 6. PECL DC CHARACTERISTICS VCC = 3.3 V; VEE = 0 V (Note 6)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
IEE
VOH
VOL
VIH
VIL
VBB
VIHCMR
Power Supply Current
Output HIGH Voltage (Note 7)
Output LOW Voltage (Note 7)
Input HIGH Voltage (Single−Ended)
Input LOW Voltage (Single−Ended)
Output Reference Voltage (Note 8)
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 9)
60
2155
1305
2135
1305
1775
1.2
90
2280
1530
1875
120
2405
1700
2420
1675
1975
3.3
60
2155
1305
2135
1305
1775
1.2
90
2280
1530
1875
120
2405
1700
2420
1675
1975
3.3
60
2155
1305
2135
1305
1775
1.2
90
2280
1530
1875
120
2405
1700
2420
1675
1975
3.3
mA
mV
mV
mV
mV
mV
V
IIH Input HIGH Current
IIL Input LOW Current
CLK 0.5
CLK −150
150
0.5
−150
150
0.5
−150
150 mA
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
6. Input and output parameters vary 1:1 with VCC. VEE can vary + 0.925 V to −0.5 V.
7. All loading with 50 W to VCC − 2.0 V.
8. Single ended input operation is limited VCC ≥ 3.0 V in PECL mode.
9. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. NECL DC CHARACTERISTICS VCC = 0 V, VEE = −2.375 V to −3.8 V (Note 10)
−40°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max
IEE Power Supply Current
60 90 120 60 90 120 60 90 120
VOH Output HIGH Voltage (Note 11) −1145 −1020 −895 −1145 −1020 −895 −1145 −1020 −895
VOL Output LOW Voltage (Note 11) −1995 −1770 −1600 −1995 −1770 −1600 −1995 −1770 −1600
Unit
mA
mV
mV
www.onsemi.com
5
5 Page 
MC100LVEP111
Driver
Device
Q
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC − 2.0 V
Figure 12. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D − Termination of ECL Logic Devices.)
Round Sprocket Holes
Designations
Quadrant A = Upper Left
Quadrant B = Upper Right
Quadrant C = Lower Left
Quadrant D = Lower Right
Quadrant
A
Quadrant
B
Quadrant
C
Quadrant
D
User Direction
of Unreeling
Figure 13. Tape and Reel Pin 1 Quadrant Orientation
ORDERING INFORMATION
Device
MC100LVEP111FAG
Package
LQFP−32
(Pb−Free)
Shipping†
250 Units / Tray
MC100LVEP111FARG
LQFP−32
(Pb−Free)
2000 / Tape & Reel
(Pin 1 Orientation in Quadrant B, Figure 13)
M100LVEP111FATWG
LQFP−32
(Pb−Free)
2000 / Tape & Reel
(Pin 1 Orientation in Quadrant A, Figure 13)
MC100LVEP111MNG
QFN−32
(Pb−Free)
74 Units / Rail
MC100LVEP111MNRG
QFN−32
(Pb−Free)
1000 / Tape & Reel
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
www.onsemi.com
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet MC100LVEP111.PDF ] | |
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