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PDF MC100E122 Data sheet ( Hoja de datos )

Número de pieza MC100E122
Descripción 9-BIT BUFFER
Fabricantes ON Semiconductor 
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MC10E122, MC100E122
5V ECL 9-Bit Buffer
Description
The MC10E/100E122 is a 9-bit buffer. The device contains nine
non-inverting buffer gates.
The 100 Series contains temperature compensation.
Features
500 ps Max. Propagation Delay
PECL Mode Operating Range: VCC = 4.2 V to 5.7 V
with VEE = 0 V
NECL Mode Operating Range: VCC = 0 V
with VEE = 4.2 V to 5.7 V
Internal Input 50 KW Pulldown Resistors
ESD Protection: Human Body Model; > 2 kV,
Machine Model; > 200 V
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
Moisture Sensitivity Level:
Pb = 1
PbFree = 3
For Additional Information, see Application Note AND8003/D
Flammability Rating: UL 94 V0 @ 0.125 in,
Oxygen Index: 28 to 34
Transistor Count = 111 devices
PbFree Packages are Available*
http://onsemi.com
PLCC28
FN SUFFIX
CASE 776
MARKING DIAGRAMS
MCxxxE122G
AWLYYWW
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = PbFree Package
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 6 of this data sheet.
*For additional information on our PbFree strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
November, 2006 Rev. 7
1
Publication Order Number:
MC10E122/D

1 page




MC100E122 pdf
MC10E122, MC100E122
Table 7. AC CHARACTERISTICS VCCx= 5.0 V; VEE= 0.0 V or VCCx= 0.0 V; VEE= 5.0 V (Note 7)
0°C
25°C
85°C
Symbol
Characteristic
Min Typ Max Min Typ Max Min Typ Max Unit
fMAX
Maximum Toggle Frequency
800 800 800 MHz
tPLH Propagation Delay to Output
ps
tPHL D to Q 150 350 500 150 350 500 150 350 500
tSKEW Within-Device Skew
ps
D to Q (Note 10)
75
75
75
tJITTER
tr
tf
Random Clock Jitter (RMS)
Rise/Fall Times
(20 - 80%)
< 1 < 1 < 1 ps
ps
300 425 800 300 425 800 300 425 800
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
9. 10 Series: VEE can vary 0.46 V / +0.06 V.
100 Series: VEE can vary 0.46 V / +0.8 V.
10. Within-device skew is defined as identical transitions on similar paths through a device.
11. Devices are designed to meet the AC specifications shown in the above table, after thermal equilibrium has been established. The circuit
is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 lfpm is maintained.
Driver
Device
Q
Q
Zo = 50 W
Zo = 50 W
50 W
50 W
D
Receiver
Device
D
VTT
VTT = VCC 2.0 V
Figure 3. Typical Termination for Output Driver and Device Evaluation
(See Application Note AND8020/D Termination of ECL Logic Devices.)
http://onsemi.com
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